C0 Compiler Final Version

assembler written for a subset of the MIPS instruction set

Assignments of the course COL216 - Computer Architecture taught in Second Sem, 2020-21 at IIT Delhi.

MIPS assembler, disassembler, debugger, syntax highlight, easily used. 😄 🎉 🎉 🎉

A Multi-core MIPS ISA, with MRM and DRAM, Simulator. Prints what is happening in every clock cycle and the final content of registers and DRAM.

Projeto de calculadora em Assembly feito em 2018 para a disciplina Arquitetura de Computadores.

🏭 Assembler to emulate and execute programs written in MIPS assembly language independent of hardware.

Compilador para linguagem de programação cafezinho

My school homeworks

Mahl (MIPS assembly high level) is a simple compiler that adds a higher level of abstraction to regular MIPS assembly

MIPS assembler supporting 55 instructions

C++ program that emulates a MIPS Assembly Interpreter

Multiprocessor Simulator with two levels of Cache hierarchy.

Data Parallel MIPS Toy Assembler

The main purpose of this project is to understand MIPS Assembly language. The input of this program is a file consisting sequence of MIPS instructions in binary. This version expands the first to implement behaviour of cache. At the end of the execution, the simulator reports the number of total cache hits and misses. These programs contain 500+…

I cannot *believe* that my former Alma Mater let this happen! There is the source code from courses taught by Professor Craig Zilles and a masters level DOCS demigod instructor called Zych at the snapshot level of 2005 to make the points about fair use among others. Welcome to the club of educational open source software contributors, boys, and …

Solutions to various computer architecture concepts.