SyReC Synthesizer - A Tool for HDL-based Synthesis of Reversible Circuits
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Updated
May 3, 2024 - C++
SyReC Synthesizer - A Tool for HDL-based Synthesis of Reversible Circuits
Virtual machine implementation of a low-level reversible stack machine optimised for performance.
A set of classes and libraries to Simulate Valleytronic Logic Gates and Computation
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