Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
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Updated
Dec 11, 2020 - VHDL
Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
An N-bit counter module written in SystemC, VHDL and Verilog
Discrete Cosine Transform verification in systemverilog and systemC
Hardware acceleration of edge detection algorithm
Source files used in the Embedded Real-Time Systems course at Aarhus University during the spring semester 2018
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