Synthesis using Synopsys DC and Physical Design flow using Synopsys ICC II, of my RISC-V 5 stage pipelined using 32 nm tech repo
routing
verilog
synthesis
cts
placement
tcl-scripts
physical-design
floorplanning
synopsys-dc
synopsys-iccii
powerplanning
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Updated
Jul 31, 2024 - Verilog