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Apr 25, 2022 - C++
vivado-hls
Here are 28 public repositories matching this topic...
Course taken by Dr Chandan Karfa of Dept. of CSE, IIT Guwahati.
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Mar 23, 2023 - C++
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Oct 9, 2017 - C++
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Apr 11, 2021 - C++
An Optimal Microarchitecture for Stencil Computation Acceleration Based on Nonuniform Partitioning of Data Reuse Buffers on FPGAs
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Sep 13, 2022 - C++
High level synthesis projects and practices
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Apr 13, 2021 - C++
A simple DNN for handwritten numbers recognition. Written in C++, and optimized using Vivado HLS.
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Nov 21, 2019 - C++
High Level synthesis of data transfer in Vivado, Vivado HLS
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May 16, 2022 - C++
A HLS IP to convert 24 bit RGB data to Grayscale data on AXI interface
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Jul 22, 2020 - C++
Accelerated Stencil Computation with Optimized Dataflow Architecture on FPGAs
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Sep 13, 2022 - C++
Introduction in Reconfigurable Computing (using reconfigurable Systems-on-Chip rSoC)
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Oct 13, 2020 - C++
This implementation of RSA is on an FPGA platform to test the performance of the algorithm in terms of latency as a comparison to AES
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Oct 19, 2018 - C++
Designing local adaptive thresholding using integral images from scratch. "Efficient Implementation of Local Adaptive Thresholding Techniques Using Integral Images" by Faisal Shafait, Daniel Keysers, Thomas M. Breuel was used as guideline.
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Aug 13, 2018 - C++
Implementation of time and space-tiled stencil in Vivado HLS.
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Sep 27, 2020 - C++
Implementation of the N^2-formulation of N-body simulation with Vivado HLS for SDAccel platforms.
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Mar 26, 2024 - C++
MNIST accelerator using pynq-z2 and the binary qunatization
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Oct 22, 2022 - C++
CPU implementation of the Image stitching using FAST. For FPGA implementation visit tharaka27-SocStitcher.
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Jun 19, 2020 - C++
FPGA Cryptography for High-Level Synthesis
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Aug 3, 2021 - C++
Source codes for High Level Synthesis for Fixed Progammable Gate Arrays (FPGAs). Can be converted to RTL using Vivado HLS or SDSoC.
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Apr 5, 2019 - C++
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