irqchip/loongson-pch-msi: Add machanism to limit msi allocation

Loongson machines can have as many as 256 logical cpus, but the maximum
of msi vectors in one irqchip is also 256 (practically that is less than
256, because pch-pic consumes some of them). Even on a 64-core machine,
256 irqs can be easily exhausted if there are several NICs (NICs usually
allocate msi irqs depending on the number of online cpus). So we want to
limit the msi allocation.

In this patch we add a machanism to limit msi allocation:
1, Modify input "nvec" by overriding the msi_domain_ops::msi_prepare();
2, The default limit is 256, which is compatible with the old behavior;
3, Add a cmdline parameter "loongson_msi_limit=xxx" to control the limit.

Signed-off-by: Juxin Gao <gaojuxin@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>

Author: chenhuacai

drivers/irqchip/irq-loongson-pch-msi.c

@@ -85,9 +85,36 @@ static void pch_msi_compose_msi_msg(struct irq_data *data,
 	msg->data = data->hwirq;
 }
 
+#define DEFAULT_MSI_LIMITS 256
+
+static int pch_msi_limits = DEFAULT_MSI_LIMITS;
+
+static int __init pch_msi_limit(char *str)
+{
+	get_option(&str, &pch_msi_limits);
+
+	if (pch_msi_limits <= 0)
+		pch_msi_limits = DEFAULT_MSI_LIMITS;
+
+	return 0;
+}
+
+early_param("loongson_msi_limit", pch_msi_limit);
+
+static int pch_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec, msi_alloc_info_t *arg)
+{
+	memset(arg, 0, sizeof(*arg));
+	return clamp_val(nvec, 0, pch_msi_limits);
+}
+
+static struct msi_domain_ops pch_msi_ops = {
+	.msi_prepare	= pch_msi_prepare,
+};
+
 static struct msi_domain_info pch_msi_domain_info = {
 	.flags	= MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
 		  MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX,
+	.ops	= &pch_msi_ops,
 	.chip	= &pch_msi_irq_chip,
 };