Intel Atom suspend: add debug check for S0ix blockers

Add a notifier called just before entering S0ix
and register two callbacks for checking if all
hardware blocks in the north complex (controller by
punit) and south complex (controlled by pmc)
are in a state that allows the SoC to enter package S0ix.
Print an error message for any device in D0.

This is a port of patches
[PATCH 1/2] pm: Add pm suspend debug notifier for South IPs
[PATCH 2/2] pm: Add pm suspend debug notifier for North IPs
from https://github.com/MiCode/Xiaomi_Kernel_OpenSource latte-l-oss

Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
[hdegoede: Add pmc-clock checks, ignore fused off blocks, PMIC I2C]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Author: js202510

arch/x86/include/asm/intel_idle.h

@@ -0,0 +1,12 @@
+#ifndef _ASM_X86_INTEL_IDLE_H
+#define _ASM_X86_INTEL_IDLE_H
+
+#include <linux/notifier.h>
+
+#ifdef CONFIG_PM_DEBUG
+void intel_idle_freeze_notifier_register(struct notifier_block *nb);
+void intel_idle_freeze_notifier_unregister(struct notifier_block *nb);
+#endif
+
+
+#endif /* _ASM_X86_INTEL_IDLE_H */

arch/x86/platform/atom/punit_atom_debug.c

@@ -16,6 +16,7 @@
 #include <asm/cpu_device_id.h>
 #include <asm/intel-family.h>
 #include <asm/iosf_mbi.h>
+#include <asm/intel_idle.h>
 
 /* Subsystem config/status Video processor */
 #define VED_SS_PM0		0x32
@@ -117,6 +118,47 @@ static void punit_dbgfs_unregister(void)
 	debugfs_remove_recursive(punit_dbg_file);
 }
 
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_INTEL_IDLE)
+struct punit_notifier_block {
+	struct notifier_block nb;
+	struct punit_device *punit_device;
+};
+
+static int punit_freeze_cb(struct notifier_block *nb,
+			   unsigned long action, void *data)
+{
+	struct punit_notifier_block *punit_nb =
+		container_of(nb, struct punit_notifier_block, nb);
+	struct punit_device *punit_devp = punit_nb->punit_device;
+	u32 punit_pwr_status;
+	int index;
+	int status;
+	int cpu = action;
+
+	while (punit_devp->name) {
+		status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
+				       punit_devp->reg, &punit_pwr_status);
+		if (status) {
+			pr_err("punit debug: %s: read failed\n",
+			       punit_devp->name);
+		} else  {
+			index = (punit_pwr_status >> punit_devp->sss_pos) & 3;
+			if (!index)
+				pr_err("punit debug: cpu %d: %s is in D0 prior to freeze\n",
+				       cpu, punit_devp->name);
+		}
+		punit_devp++;
+	}
+	return 0;
+}
+
+static struct punit_notifier_block punit_freeze_nb = {
+	.nb = {
+		.notifier_call = punit_freeze_cb,
+	},
+};
+#endif
+
 #define X86_MATCH(model, data)						 \
 	X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
 					   X86_FEATURE_MWAIT, data)
@@ -139,11 +181,18 @@ static int __init punit_atom_debug_init(void)
 
 	punit_dbgfs_register((struct punit_device *)id->driver_data);
 
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_INTEL_IDLE)
+	punit_freeze_nb.punit_device = (struct punit_device *)id->driver_data;
+	intel_idle_freeze_notifier_register(&punit_freeze_nb.nb);
+#endif
 	return 0;
 }
 
 static void __exit punit_atom_debug_exit(void)
 {
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_INTEL_IDLE)
+	intel_idle_freeze_notifier_unregister(&punit_freeze_nb.nb);
+#endif
 	punit_dbgfs_unregister();
 }
 

drivers/idle/intel_idle.c

@@ -52,6 +52,7 @@
 #include <linux/moduleparam.h>
 #include <asm/cpu_device_id.h>
 #include <asm/intel-family.h>
+#include <asm/intel_idle.h>
 #include <asm/mwait.h>
 #include <asm/msr.h>
 
@@ -103,6 +104,22 @@ static unsigned int mwait_substates __initdata;
 #define flg2MWAIT(flags) (((flags) >> 24) & 0xFF)
 #define MWAIT2flg(eax) ((eax & 0xFF) << 24)
 
+#ifdef CONFIG_PM_DEBUG
+static RAW_NOTIFIER_HEAD(intel_idle_freeze_notifier);
+
+void intel_idle_freeze_notifier_register(struct notifier_block *nb)
+{
+	raw_notifier_chain_register(&intel_idle_freeze_notifier, nb);
+}
+EXPORT_SYMBOL(intel_idle_freeze_notifier_register);
+
+void intel_idle_freeze_notifier_unregister(struct notifier_block *nb)
+{
+	raw_notifier_chain_unregister(&intel_idle_freeze_notifier, nb);
+}
+EXPORT_SYMBOL(intel_idle_freeze_notifier_unregister);
+#endif
+
 /**
  * intel_idle - Ask the processor to enter the given idle state.
  * @dev: cpuidle device of the target CPU.
@@ -150,6 +167,9 @@ static __cpuidle int intel_idle_s2idle(struct cpuidle_device *dev,
 	unsigned long eax = flg2MWAIT(drv->states[index].flags);
 	unsigned long ecx = 1; /* break on interrupt flag */
 
+#ifdef CONFIG_PM_DEBUG
+	raw_notifier_call_chain(&intel_idle_freeze_notifier, dev->cpu, NULL);
+#endif
 	mwait_idle_with_hints(eax, ecx);
 
 	return 0;

drivers/platform/x86/pmc_atom.c

@@ -16,6 +16,15 @@
 #include <linux/platform_device.h>
 #include <linux/pci.h>
 #include <linux/seq_file.h>
+#include <asm/intel_idle.h>
+
+#define PMC_CLK_CTL_OFFSET		0x60
+#define PMC_CLK_NUM			6
+#define PMC_CLK_CTL_GATED_ON_D3		0x0
+#define PMC_CLK_CTL_FORCE_ON		0x1
+#define PMC_CLK_CTL_FORCE_OFF		0x2
+#define PMC_CLK_CTL_RESERVED		0x3
+#define PMC_MASK_CLK_CTL		GENMASK(1, 0)
 
 struct pmc_bit_map {
 	const char *name;
@@ -479,6 +488,94 @@ static int pmc_setup_clks(struct pci_dev *pdev, void __iomem *pmc_regmap,
 	return 0;
 }
 
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_INTEL_IDLE)
+struct pmc_notifier_block {
+	struct notifier_block nb;
+	struct pmc_dev *pmc;
+};
+
+static void pmc_dev_state_check(int cpu, u32 sts, const struct pmc_bit_map *sts_map,
+				u32 fd, const struct pmc_bit_map *fd_map,
+				u32 sts_possible_false_pos)
+{
+	int index;
+
+	for (index = 0; sts_map[index].name; index++) {
+		if (!(fd_map[index].bit_mask & fd) &&
+		    !(sts_map[index].bit_mask & sts)) {
+			if (sts_map[index].bit_mask & sts_possible_false_pos)
+				pr_debug("pmc_atom: cpu %d: %s is in D0 prior to freeze\n",
+					 cpu, sts_map[index].name);
+			else
+				pr_err("pmc_atom: cpu %d: %s is in D0 prior to freeze\n",
+				       cpu, sts_map[index].name);
+		}
+	}
+}
+
+static int pmc_freeze_cb(struct notifier_block *nb,
+			 unsigned long action, void *data)
+{
+	struct pmc_notifier_block *pmc_nb =
+		container_of(nb, struct pmc_notifier_block, nb);
+	struct pmc_dev *pmc = pmc_nb->pmc;
+	const struct pmc_reg_map *m = pmc->map;
+	u32 func_dis, func_dis_2;
+	u32 d3_sts_0, d3_sts_1;
+	u32 false_pos_sts_0, false_pos_sts_1;
+	int cpu = action;
+	int i;
+
+	func_dis = pmc_reg_read(pmc, PMC_FUNC_DIS);
+	func_dis_2 = pmc_reg_read(pmc, PMC_FUNC_DIS_2);
+	d3_sts_0 = pmc_reg_read(pmc, PMC_D3_STS_0);
+	d3_sts_1 = pmc_reg_read(pmc, PMC_D3_STS_1);
+
+	/*
+	 * Some blocks are not used on lower-featured versions of the SoC and
+	 * always report D0, these masks makes us log these at debug lvl.
+	 */
+	if (m->d3_sts_1	== byt_d3_sts_1_map) {
+		/* BYT */
+		false_pos_sts_0 = BIT_GBE | BIT_SATA | BIT_PCIE_PORT0 |
+			BIT_PCIE_PORT1 | BIT_PCIE_PORT2 | BIT_PCIE_PORT3 |
+			BIT_LPSS2_F5_I2C5;
+		false_pos_sts_1 = BIT_SMB | BIT_USH_SS_PHY | BIT_DFX;
+	} else {
+		/* CHT */
+		false_pos_sts_0 = BIT_GBE | BIT_SATA | BIT_LPSS2_F7_I2C7;
+		false_pos_sts_1 = BIT_SMB | BIT_STS_ISH;
+	}
+
+	/* Low part */
+	pmc_dev_state_check(cpu, d3_sts_0, m->d3_sts_0, func_dis, m->func_dis,
+			    false_pos_sts_0);
+
+	/* High part */
+	pmc_dev_state_check(cpu, d3_sts_1, m->d3_sts_1, func_dis_2, m->func_dis_2,
+			    false_pos_sts_1);
+
+	/* Check PMC clocks */
+	for (i = 0; i < PMC_CLK_NUM; i++) {
+		u32 ctl = pmc_reg_read(pmc, PMC_CLK_CTL_OFFSET + 4 * i);
+
+		if ((ctl & PMC_MASK_CLK_CTL) != PMC_CLK_CTL_FORCE_ON)
+			continue;
+
+		pr_err("pmc debug: cpu %d: clk %d is ON prior to freeze (ctl %08x)\n",
+		       cpu, i, ctl);
+	}
+
+	return 0;
+}
+
+static struct pmc_notifier_block pmc_freeze_nb = {
+	.nb = {
+		.notifier_call = pmc_freeze_cb,
+	},
+};
+#endif
+
 static int pmc_setup_dev(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
 	struct pmc_dev *pmc = &pmc_device;
@@ -516,6 +613,11 @@ static int pmc_setup_dev(struct pci_dev *pdev, const struct pci_device_id *ent)
 		dev_warn(&pdev->dev, "platform clocks register failed: %d\n",
 			 ret);
 
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_INTEL_IDLE)
+	pmc_freeze_nb.pmc = pmc;
+	intel_idle_freeze_notifier_register(&pmc_freeze_nb.nb);
+#endif
+
 	pmc->init = true;
 	return ret;
 }