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@yiliu30 yiliu30 commented Nov 26, 2025

Purpose

cd vllm
python examples/offline_inference/basic/generate.py  \
    --model Intel/Qwen3-8B-W4A16-G128-AutoRound-LLMC-TEST-ONLY \
    --gpu_memory_utilization 0.75 \
    --enforce-eager 

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  • The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
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Signed-off-by: yiliu30 <yi4.liu@intel.com>
Signed-off-by: yiliu30 <yi4.liu@intel.com>
Signed-off-by: yiliu30 <yi4.liu@intel.com>
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Code Review

This pull request introduces support for wNa16 compressed tensors on XPU by adding a new IPEXwNa16LinearKernel. The changes are mostly self-contained in a new file and registration of the new kernel. However, I've found a critical issue in the implementation of the new kernel within vllm/model_executor/layers/quantization/kernels/mixed_precision/ipex.py. The input feature size for the underlying IPEX linear layer is calculated incorrectly, which will likely lead to runtime failures or incorrect computations. I have also pointed out a confusing and redundant variable assignment that should be cleaned up. Please see the detailed comments for suggestions on how to fix these issues.

@hshen14
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hshen14 commented Nov 26, 2025

@robertgshaw2-redhat @mgoin Please help review. The PR is to support the quantized models with compressed tensor format (e.g., quantized by LLM-C/AutoRound) for Intel GPUs.

Signed-off-by: yiliu30 <yi4.liu@intel.com>
Signed-off-by: yiliu30 <yi4.liu@intel.com>
Signed-off-by: yiliu30 <yi4.liu@intel.com>
Signed-off-by: yiliu30 <yi4.liu@intel.com>
@xuechendi
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@mgoin @robertgshaw2-redhat , may you help to take a look?

@mergify mergify bot added the ci/build label Dec 5, 2025
@jikunshang jikunshang added the ready ONLY add when PR is ready to merge/full CI is needed label Dec 5, 2025
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LGTM for xpu part.

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4 participants