Renesas RA "PLL P Q R" line clock cannot be choose as source clock

[duynguyenxa]

Describe the bug
The new update of clock device tree at PR #78365 help to change the description of the device tree of clock configuration for Renesas RA MCU in standard manner but make the PLL P Q R clock source cannot be chosen as source clock for other nodes on Renesas RA8

Expected behavior
PLL P Q R line can be choose as source clock

[duynguyenxa]

The fix for this is provided in #79766