stm32: perform stm32n6 RIF configuration in a centralized soc function #100695
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mathieuchopstm
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LGTM w/ two minor nits
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December 9, 2025 11:26
Perform all the IPs RIF configuration at init time in case of this isn't yet performed by an earlier entity during the boot sequence. This configuration depends on TRUSTED_EXECUTION_SECURE which is currently always enabled on STM32N6x but will be configurable in future. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
RIF configuration is now done at soc init time in a centralized way so it is no more necessary for drivers to perform this configuration. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
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Currently the RIF configuration of the STM32N6 is performed in each related driver. This requires to add those dedicated call in each driver and moreover this might not always be needed.
Currently Zephyr is running in priviledge mode so is able to perform such configuration and needs to perform configuration this way but this is not always the case especially if Zephyr is not running in secure mode.
For this reason, move all those RIF configuration in a dedicated SOC specific function which is only called if Zephyr is "alone" running on the SOC.
In case of another entity has already run before (such as TF-M), this entity will have already set the RIF prior to reaching Zephyr and Zephyr will most probably not have enough right to set those, in such case the function will not be called.