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10 changes: 10 additions & 0 deletions boards/coredevices/index.rst
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.. _boards-coredevices:

Core Devices LLC
################

.. toctree::
:maxdepth: 1
:glob:

**/*
5 changes: 5 additions & 0 deletions boards/coredevices/p2d/Kconfig.p2d
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# Copyright (c) 2025 Core Devices LLC
# SPDX-License-Identifier: Apache-2.0

config BOARD_P2D
select SOC_NRF52840_QIAA
11 changes: 11 additions & 0 deletions boards/coredevices/p2d/board.cmake
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# Copyright (c) 2025 Core Devices LLC
# SPDX-License-Identifier: Apache-2.0

board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000")
board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")

include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake)
9 changes: 9 additions & 0 deletions boards/coredevices/p2d/board.yml
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# Copyright (c) 2025 Core Devices LLC
# SPDX-License-Identifier: Apache-2.0

boards:
- name: p2d
full_name: Pebble 2 Duo
vendor: coredevices
socs:
- name: nrf52840
Binary file added boards/coredevices/p2d/doc/img/p2d.webp
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45 changes: 45 additions & 0 deletions boards/coredevices/p2d/doc/index.rst
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.. zephyr:board:: p2d

Overview
********

Pebble 2 Duo is a smart watch based on the nRF52840 series chip SoC.

More information about the watch can be found at the `RePebble website`_.

Hardware
********

Pebble 2 Duo provides the following hardware components:

- Nordic nRF52840
- nPM1300 PMIC for power supply and battery charging
- GD25LE255E 256 Mb QSPI NOR
- Sharp LS013B7DH05 Memory-in-Pixel (MiP) monochrome display
- PWM backlight control using TPS22916 driver
- OPT3001 ambient light sensor
- 4 physical buttons
- LSM6DSOW IMU (accelerometer/gyroscope)
- MMC5603NJ magnetometer
- MSM261DDB020 PDM microphone
- Speaker driven by DA7212 audio codec
- LRA driven by TI DRV2604 haptic driver
- Programming connector

Supported Features
==================

.. zephyr:board-supported-hw::

Programming and Debugging
*************************

.. zephyr:board-supported-runners::

References
**********

.. target-notes::

.. _RePebble website:
https://repebble.com/
136 changes: 136 additions & 0 deletions boards/coredevices/p2d/p2d-pinctrl.dtsi
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/*
* Copyright (c) 2025 Core Devices LLC
* SPDX-License-Identifier: Apache-2.0
*/

&pinctrl {
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 15)>,
<NRF_PSEL(TWIM_SCL, 0, 14)>;
};
};

i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 15)>,
<NRF_PSEL(TWIM_SCL, 0, 14)>;
low-power-enable;
};
};

i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 11)>,
<NRF_PSEL(TWIM_SCL, 0, 25)>;
};
};

i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 11)>,
<NRF_PSEL(TWIM_SCL, 0, 25)>;
low-power-enable;
};
};

i2s0_default: i2s0_default {
group1 {
psels = <NRF_PSEL(I2S_MCK, 1, 9)>,
<NRF_PSEL(I2S_SCK_M, 0, 12)>,
<NRF_PSEL(I2S_LRCK_M, 0, 7)>,
<NRF_PSEL(I2S_SDOUT, 0, 13)>;
};
};

i2s0_sleep: i2s0_sleep {
group1 {
psels = <NRF_PSEL(I2S_MCK, 1, 9)>,
<NRF_PSEL(I2S_SCK_M, 0, 12)>,
<NRF_PSEL(I2S_LRCK_M, 0, 7)>,
<NRF_PSEL(I2S_SDOUT, 0, 13)>;
low-power-enable;
};
};

pdm0_default: pdm0_default {
group1 {
psels = <NRF_PSEL(PDM_CLK, 1, 00)>,
<NRF_PSEL(PDM_DIN, 0, 24)>;
};
};

pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 26)>;
};
};

pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 26)>;
low-power-enable;
};
};

qspi_default: qspi_default {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 20)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 22)>,
<NRF_PSEL(QSPI_IO3, 0, 23)>,
<NRF_PSEL(QSPI_CSN, 0, 17)>;
nordic,drive-mode = <NRF_DRIVE_H0H1>;
};
};

qspi_sleep: qspi_sleep {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 20)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 22)>,
<NRF_PSEL(QSPI_IO3, 0, 23)>;
low-power-enable;
};
group2 {
psels = <NRF_PSEL(QSPI_CSN, 0, 17)>;
low-power-enable;
bias-pull-up;
};
};

spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 6)>,
<NRF_PSEL(SPIM_MOSI, 0, 8)>;
};
};

spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 6)>,
<NRF_PSEL(SPIM_MOSI, 0, 8)>;
low-power-enable;
};
};

uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 27)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 5)>;
bias-pull-up;
};
};

uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 27)>,
<NRF_PSEL(UART_RX, 0, 5)>;
low-power-enable;
};
};
};
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