tests: watchdog: retain memory for frdm_mcxw23 and mcxw23_evk #98625
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Added board shared sram bypass first 8KB overlay. The overlay configure shall bypass first 8KB memory to avoid being clear during system startup. Signed-off-by: Allen Zhang <chunfeng.zhang@nxp.com>
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added
area: Boards/SoCs
platform: NXP
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requested review from
DerekSnell,
EmilioCBen,
George-Stefan,
MaochenWang1,
axelnxp,
butok,
decsny,
dleach02,
katsuster,
martinjaeger,
mmahadevan108 and
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ci failure is reported #97023 |
twister regression test pass on v4.3.0-rc1-142-gae1af302830f |
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@AllenZhang-NXP is this because the first 8K does not get retained over resets? We have been aware of multiple platforms where this lack of retention impacts this test case. |
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Added board shared sram bypass first 8KB overlay.
The overlay configure shall bypass first 8KB memory to avoid being clear during system startup.
In test_wdt.c, there're three variables m_state, m_testcase_index and m_testvalue which are linked in the NOINIT_SECTION section.
And these three variables are used to store the test state and the test case index, after the watchdog reset, this case will check the value of the m_state and m_testcase_index, then add 1 to m_testcase_index and run the next test case.
I checked the memory map and found these three variables are linked to:
0x200055e8 m_testvalue
0x200055ec m_testcase_index
0x200055f0 m_state
After the watchdog trigger a reset, the memory starts from 0x20005000 ~ 0x20005BC0 will be set to 0 automatically (Confirmed it is a silicon behaviour, maybe ROM code do this).
As a result, the value of the variables will be cleared to 0. This is why this case is always reset.
Validated the commands below, hi @hakehuang, please help to double check, thank you!
west build -p=auto tests/drivers/watchdog/wdt_basic_api -b frdm_mcxw23 -T drivers.watchdog.nxp_mcxw2xx_bypass_first_8k
west build -p=auto tests/drivers/watchdog/wdt_basic_api -b mcxw23_evk -T drivers.watchdog.nxp_mcxw2xx_bypass_first_8k
Fixes #98282