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dts: st: l4: fix stm32l4xx sai availability #98671

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Merged
merged 1 commit into from
Nov 4, 2025
Merged

dts: st: l4: fix stm32l4xx sai availability #98671

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25 changes: 0 additions & 25 deletions dts/arm/st/l4/stm32l4.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,6 @@
* Copyright (c) 2017 Linaro Limited
* Copyright (c) 2019 Centaur Analytics, Inc
* Copyright (c) 2024 STMicroelectronics
* Copyright (c) 2025 Mario Paja
*
* SPDX-License-Identifier: Apache-2.0
*/
Expand Down Expand Up @@ -591,30 +590,6 @@
i2c = <&i2c3>;
status = "disabled";
};

sai1_a: sai1@40015404 {
compatible = "st,stm32-sai";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40015404 0x20>;
clocks = <&rcc STM32_CLOCK(APB2, 21)>,
<&rcc STM32_SRC_PLLSAI1_P SAI1_SEL(0)>;
dmas = <&dma2 1 1 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
STM32_DMA_16BITS)>;
status = "disabled";
};

sai1_b: sai1@40015424 {
compatible = "st,stm32-sai";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40015424 0x20>;
clocks = <&rcc STM32_CLOCK(APB2, 21)>,
<&rcc STM32_SRC_PLLSAI1_P SAI1_SEL(0)>;
dmas = <&dma2 2 1 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
STM32_DMA_16BITS)>;
status = "disabled";
};
};

&nvic {
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1 change: 1 addition & 0 deletions dts/arm/st/l4/stm32l431.dtsi
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*/

#include <st/l4/stm32l4.dtsi>
#include <st/l4/stm32l4_sai.dtsi>

/ {
clocks {
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1 change: 1 addition & 0 deletions dts/arm/st/l4/stm32l432.dtsi
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*/

#include <st/l4/stm32l4.dtsi>
#include <st/l4/stm32l4_sai.dtsi>

/ {
clocks {
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1 change: 1 addition & 0 deletions dts/arm/st/l4/stm32l451.dtsi
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*/

#include <st/l4/stm32l4.dtsi>
#include <st/l4/stm32l4_sai.dtsi>
#include <zephyr/dt-bindings/sensor/qdec_stm32.h>

/ {
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1 change: 1 addition & 0 deletions dts/arm/st/l4/stm32l471.dtsi
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*/

#include <st/l4/stm32l4.dtsi>
#include <st/l4/stm32l4_sai.dtsi>
#include <zephyr/dt-bindings/sensor/qdec_stm32.h>

/ {
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33 changes: 33 additions & 0 deletions dts/arm/st/l4/stm32l4_sai.dtsi
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@@ -0,0 +1,33 @@
/*
* Copyright (c) 2025 Mario Paja
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
soc {
sai1_a: sai1@40015404 {
compatible = "st,stm32-sai";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40015404 0x20>;
clocks = <&rcc STM32_CLOCK(APB2, 21)>,
<&rcc STM32_SRC_PLLSAI1_P SAI1_SEL(0)>;
dmas = <&dma2 1 1 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
STM32_DMA_16BITS)>;
status = "disabled";
};

sai1_b: sai1@40015424 {
compatible = "st,stm32-sai";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40015424 0x20>;
clocks = <&rcc STM32_CLOCK(APB2, 21)>,
<&rcc STM32_SRC_PLLSAI1_P SAI1_SEL(0)>;
dmas = <&dma2 2 1 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
STM32_DMA_16BITS)>;
status = "disabled";
};
};
};
1 change: 1 addition & 0 deletions dts/arm/st/l4/stm32l4p5.dtsi
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Expand Up @@ -5,6 +5,7 @@
*/

#include <st/l4/stm32l4.dtsi>
#include <st/l4/stm32l4_sai.dtsi>
#include <zephyr/dt-bindings/clock/stm32l4plus_clock.h>
#include <zephyr/dt-bindings/flash_controller/ospi.h>
#include <zephyr/dt-bindings/sensor/qdec_stm32.h>
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