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soc: nxp: mcux: Enable DMAMUX driver for S32Z270 #99190

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soc: nxp: mcux: Enable DMAMUX driver for S32Z270 #99190

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17 changes: 16 additions & 1 deletion drivers/dma/Kconfig.mcux_edma
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@@ -1,10 +1,11 @@
# DMA configuration options

# Copyright (c) 2020, NXP
# Copyright (c) 2020, 2025 NXP
# SPDX-License-Identifier: Apache-2.0

EDMA_COMPAT := $(DT_COMPAT_NXP_MCUX_EDMA)
REV_PROP := nxp,version
MUX_TYPE := mux-type

config DMA_MCUX_EDMA
bool "MCUX DMA driver"
Expand Down Expand Up @@ -35,6 +36,20 @@ config DMA_MCUX_EDMA_V5
help
DMA version 5 driver for MCUX series SoCs.

config DMA_MCUX_EDMA_DMAMUX
bool "DMAMUX support"
default y
depends on $(dt_compat_any_has_prop,$(EDMA_COMPAT),$(MUX_TYPE),DMAMUX)
help
Enable DMAMUX support for EDMA controller.

config DMA_MCUX_EDMA_TRGMUX
bool "TRGMUX support"
default y
depends on $(dt_compat_any_has_prop,$(EDMA_COMPAT),$(MUX_TYPE),TRGMUX)
help
Enable TRGMUX support for EDMA controller.

config DMA_MCUX_MAX_DATA_SIZE
int
default 64 if DMA_MCUX_EDMA_V5 || DMA_MCUX_EDMA_V4 || DMA_MCUX_EDMA_V3
Expand Down
1 change: 1 addition & 0 deletions dts/arm/nxp/nxp_k6x.dtsi
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@@ -1,4 +1,4 @@
/* SPDX-License-Identifier: Apache-2.0 */

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dts/arm/nxp/nxp_k6x.dtsi:1 File has no SPDX-FileCopyrightText header, consider adding one.

#include <mem.h>
#include <freq.h>
Expand Down Expand Up @@ -527,6 +527,7 @@
nxp,version = <2>;
dma-channels = <16>;
dma-requests = <64>;
mux-type = "DMAMUX";
nxp,mem2mem;
reg = <0x40008000 0x1000>,
<0x40021000 0x1000>;
Expand Down
1 change: 1 addition & 0 deletions dts/arm/nxp/nxp_k8x.dtsi
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Expand Up @@ -430,6 +430,7 @@
nxp,version = <2>;
dma-channels = <16>;
dma-requests = <64>;
mux-type = "DMAMUX";
nxp,mem2mem;
reg = <0x40008000 0x1000>,
<0x40021000 0x1000>;
Expand Down
1 change: 1 addition & 0 deletions dts/arm/nxp/nxp_ke1xf.dtsi
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Expand Up @@ -102,6 +102,7 @@
nxp,version = <2>;
dma-channels = <16>;
dma-requests = <64>;
mux-type = "DMAMUX";
nxp,mem2mem;
reg = <0x40008000 0x1000>, <0x40021000 0x1000>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
Expand Down
1 change: 1 addition & 0 deletions dts/arm/nxp/nxp_ke1xz.dtsi
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Expand Up @@ -495,6 +495,7 @@
nxp,version = <2>;
dma-channels = <8>;
dma-requests = <64>;
mux-type = "DMAMUX";
nxp,mem2mem;
reg = <0x40008000 0x1000>, <0x40021000 0x1000>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
Expand Down
1 change: 1 addition & 0 deletions dts/arm/nxp/nxp_mcxe24x_common.dtsi
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Expand Up @@ -178,6 +178,7 @@
nxp,version = <2>;
dma-channels = <16>;
dma-requests = <64>;
mux-type = "DMAMUX";
nxp,mem2mem;
reg = <0x40008000 0x1000>, <0x40021000 0x1000>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
Expand Down
1 change: 1 addition & 0 deletions dts/arm/nxp/nxp_mcxw7x_common.dtsi
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@@ -1,3 +1,3 @@
/*
* Copyright 2024-2025 NXP
*
Expand Down Expand Up @@ -47,7 +47,7 @@
compatible = "zephyr,power-state";
power-state-name = "suspend-to-idle";
exit-latency-us = <10>;
};

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dts/arm/nxp/nxp_mcxw7x_common.dtsi:50 Insert new lines. Expecting 2.
deep_sleep: deep-sleep {
compatible = "zephyr,power-state";
power-state-name = "standby";
Expand Down Expand Up @@ -431,12 +431,13 @@
nxp,version = <3>;
dma-channels = <16>;
dma-requests = <64>;
mux-type = "TRGMUX";
reg = <0x2000 0x140>;
clocks = <&scg SCG_K4_EDMA_CLK 0x410>;
interrupts = <2 0>, <3 0>, <4 0>, <5 0>,
<6 0>, <7 0>, <8 0>, <9 0>,

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dts/arm/nxp/nxp_mcxw7x_common.dtsi:438 Fix indentation. Expecting →→→·····
<10 0>, <11 0>, <12 0>, <13 0>,

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dts/arm/nxp/nxp_mcxw7x_common.dtsi:439 Fix indentation. Expecting →→→·····
<14 0>, <15 0>, <16 0>, <17 0>;

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dts/arm/nxp/nxp_mcxw7x_common.dtsi:440 Fix indentation. Expecting →→→·····
status = "disabled";
};

Expand Down
1 change: 1 addition & 0 deletions dts/arm/nxp/nxp_rt10xx.dtsi
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Expand Up @@ -950,6 +950,7 @@
nxp,version = <2>;
dma-channels = <32>;
dma-requests = <128>;
mux-type = "DMAMUX";
nxp,mem2mem;
nxp,a-on;
reg = <0x400E8000 0x4000>,
Expand Down
2 changes: 2 additions & 0 deletions dts/arm/nxp/nxp_rt11xx.dtsi
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Expand Up @@ -1040,6 +1040,7 @@
nxp,version = <2>;
dma-channels = <32>;
dma-requests = <208>;
mux-type = "DMAMUX";
nxp,mem2mem;
nxp,a-on;
reg = <0x40070000 0x4000>,
Expand All @@ -1059,6 +1060,7 @@
nxp,version = <2>;
dma-channels = <32>;
dma-requests = <208>;
mux-type = "DMAMUX";
nxp,mem2mem;
nxp,a-on;
reg = <0x40c14000 0x4000>,
Expand Down
1 change: 1 addition & 0 deletions dts/arm/nxp/nxp_s32k344_m7.dtsi
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Expand Up @@ -664,6 +664,7 @@
dma-channels = <32>;
dma-requests = <64>;
dmamux-reg-offset = <3>;
mux-type = "DMAMUX";
channel-gap = <12 127>;
#dma-cells = <2>;
nxp,mem2mem;
Expand Down
4 changes: 4 additions & 0 deletions dts/arm/nxp/nxp_s32z27x_r52.dtsi
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Expand Up @@ -1153,6 +1153,7 @@
dma-channels = <32>;
dma-requests = <64>;
dmamux-reg-offset = <3>;
mux-type = "DMAMUX";
#dma-cells = <2>;
nxp,mem2mem;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
Expand Down Expand Up @@ -1198,6 +1199,7 @@
dma-channels = <16>;
dma-requests = <64>;
dmamux-reg-offset = <3>;
mux-type = "DMAMUX";
#dma-cells = <2>;
nxp,mem2mem;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
Expand Down Expand Up @@ -1227,6 +1229,7 @@
dma-channels = <32>;
dma-requests = <64>;
dmamux-reg-offset = <3>;
mux-type = "DMAMUX";
#dma-cells = <2>;
nxp,mem2mem;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
Expand Down Expand Up @@ -1256,6 +1259,7 @@
dma-channels = <32>;
dma-requests = <64>;
dmamux-reg-offset = <3>;
mux-type = "DMAMUX";
#dma-cells = <2>;
nxp,mem2mem;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
Expand Down
13 changes: 12 additions & 1 deletion dts/bindings/dma/nxp,mcux-edma.yaml
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@@ -1,4 +1,4 @@
# Copyright (c) 2020,2024 NXP
# Copyright (c) 2020,2024-2025 NXP
# SPDX-License-Identifier: Apache-2.0

description: NXP MCUX EDMA controller
Expand Down Expand Up @@ -38,6 +38,17 @@ properties:
The offset value for obtaining DMAMUX register index from DMAMUX channel.
Default value means DMAMUX channel is identical with DMAMUX register index

mux-type:
type: string
enum:
- "DMAMUX"
- "TRGMUX"
description: |
Specifies the type of multiplexer used for DMA request routing.
- DMAMUX: Direct Memory Access Multiplexer
- TRGMUX: Trigger Multiplexer
If not specified, no specific multiplexer type is assumed.

channel-gap:
type: array
description: |
Expand Down
16 changes: 6 additions & 10 deletions modules/hal_nxp/mcux/mcux-sdk-ng/drivers/drivers.cmake
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Expand Up @@ -57,7 +57,8 @@ set_variable_ifdef(CONFIG_COUNTER_MCUX_RTC CONFIG_MCUX_COMPONENT_driver.rtc
set_variable_ifdef(CONFIG_DAC_MCUX_DAC CONFIG_MCUX_COMPONENT_driver.dac)
set_variable_ifdef(CONFIG_DAC_MCUX_DAC12 CONFIG_MCUX_COMPONENT_driver.dac12)
set_variable_ifdef(CONFIG_DAC_MCUX_DAC32 CONFIG_MCUX_COMPONENT_driver.dac32)
set_variable_ifdef(CONFIG_DMA_MCUX_EDMA CONFIG_MCUX_COMPONENT_driver.dmamux)
set_variable_ifdef(CONFIG_DMA_MCUX_EDMA_DMAMUX CONFIG_MCUX_COMPONENT_driver.dmamux)
set_variable_ifdef(CONFIG_DMA_MCUX_EDMA_TRGMUX CONFIG_MCUX_COMPONENT_driver.trgmux)
set_variable_ifdef(CONFIG_DMA_MCUX_EDMA CONFIG_MCUX_COMPONENT_driver.edma)
set_variable_ifdef(CONFIG_DMA_MCUX_EDMA_V3 CONFIG_MCUX_COMPONENT_driver.dma3)
set_variable_ifdef(CONFIG_DMA_MCUX_EDMA_V4 CONFIG_MCUX_COMPONENT_driver.edma4)
Expand Down Expand Up @@ -232,11 +233,13 @@ if(CONFIG_SOC_MCXW716C OR CONFIG_SOC_MCXW727C OR CONFIG_SOC_MCXN947 OR CONFIG_SO
set_variable_ifdef(CONFIG_SOC_FLASH_MCUX CONFIG_MCUX_COMPONENT_driver.flash_k4)
endif()

if(CONFIG_DMA_MCUX_EDMA_TRGMUX)
zephyr_include_directories(${MCUX_SDK_NG_DIR}/drivers/trgmux)
endif()

if(CONFIG_SOC_MCXW716C OR CONFIG_SOC_MCXW727C)
if(CONFIG_DMA)
zephyr_include_directories(${MCUX_SDK_NG_DIR}/drivers/trgmux)
set_variable_ifdef(CONFIG_MBOX_NXP_IMX_MU CONFIG_MCUX_COMPONENT_driver.mu)
set(CONFIG_MCUX_COMPONENT_driver.trgmux ON)
endif()
endif()

Expand Down Expand Up @@ -303,13 +306,6 @@ if(CONFIG_SOC_SERIES_IMXRT118X)
set_variable_ifdef(CONFIG_WDT_MCUX_RTWDOG CONFIG_MCUX_COMPONENT_driver.src_3)
endif()

if(${MCUX_DEVICE} MATCHES "S32K3")
if(CONFIG_DMA)
zephyr_include_directories(${MCUX_SDK_NG_DIR}/drivers/dmamux)
set(CONFIG_MCUX_COMPONENT_driver.dmamux ON)
endif()
endif()

if(CONFIG_SOC_FAMILY_MCXA)
set(CONFIG_MCUX_COMPONENT_driver.romapi ON)
endif()
Expand Down
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