You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Changed weights layout for Depthwise Convolution Operator from [M,I,H,W] to [1,H,W,I*M].
Added QUANT8_ASYMM_SIGNED support for PadV2 Operator.
Added SIN and LOG support to ElementWiseUnary Operator.
Bug Fixes
Fixed uninitialised m_Optional field in ConstTensorPin.
Fixed Wsign-compare compiler error and improved compiler warnings.
Note
If building with FP16 support enabled for the CpuAcc backend on Android P or Q, a new flag (DARM_COMPUTE_ENABLE_FP16) must be added to the scons parameters when building Arm Compute Library.