This repository contains the complete design and implementation of the u-4UGI 8-bit custom processor implemented in VHDL, developed as the final project for the Computer Architecture course.
8 General Purpose Registers: R0 to R7, each 8-bit wide
8-bit ALU Operations: Supports arithmetic and logical operations
16-bit Instruction Format
512-byte Addressable Memory: Separate regions for data and program memory
Supported Instruction Set:
Arithmetic/Logic: Add, Sub, AddI, SubI, ADC, CMP, Xor, And, SHL, SHR
Memory Access: LD, ST
Control Flow: Br, BZ, BS, BNZ
Instruction format design and encoding
Instruction Fetch and Decode Unit
Arithmetic Logic Unit (ALU)
Program Counter (PC) management
Separate Memory Read/Write Unit for data and program memory
8-register Register File
Control Unit for instruction execution
Example machine code program for functional testing
https://github.com/BehrazFS
https://github.com/RozhinaLatifi