GitHub - BobbbbbZ/Micro-com-Design

Name	Name	Last commit message	Last commit date
Latest commit History 2 Commits
ClockGen	ClockGen
ClockGen_sim	ClockGen_sim
Ide68k	Ide68k
Programs	Programs
assignment1	assignment1
greybox_tmp	greybox_tmp
hyperterminal/hyperterminal	hyperterminal/hyperterminal
.gitignore	.gitignore
ACIA_6850.bsf	ACIA_6850.bsf
ACIA_6850.vhd	ACIA_6850.vhd
ACIA_BaudRate_Generator.bdf	ACIA_BaudRate_Generator.bdf
ACIA_BaudRate_Generator.bsf	ACIA_BaudRate_Generator.bsf
ACIA_Clock.bsf	ACIA_Clock.bsf
ACIA_Clock.vhd	ACIA_Clock.vhd
ACIA_RX.vhd	ACIA_RX.vhd
ACIA_TX.vhd	ACIA_TX.vhd
AddressComparator.bsf	AddressComparator.bsf
AddressComparator.v	AddressComparator.v
AddressComparator.v.bak	AddressComparator.v.bak
AddressComparator.vhd	AddressComparator.vhd
AddressComparator.vhd.bak	AddressComparator.vhd.bak
AddressComparator_Associative.bsf	AddressComparator_Associative.bsf
AddressComparator_Associative.v	AddressComparator_Associative.v
AddressComparator_Associative.v.bak	AddressComparator_Associative.v.bak
AddressDecoderScroll.bsf	AddressDecoderScroll.bsf
AddressDecoder_Verilog.bsf	AddressDecoder_Verilog.bsf
AddressDecoder_Verilog.v	AddressDecoder_Verilog.v
AddressDecoder_Verilog.v.bak	AddressDecoder_Verilog.v.bak
AddressException.bdf	AddressException.bdf
AddressTriState.cmp	AddressTriState.cmp
AddressTriState.qip	AddressTriState.qip
Assignment1.cdf	Assignment1.cdf
AssociativeCache_Set.bdf	AssociativeCache_Set.bdf
AssociativeCache_Set.bsf	AssociativeCache_Set.bsf
AssociativeCachedDramController.bdf	AssociativeCachedDramController.bdf
AssociativeCachedDramController.bsf	AssociativeCachedDramController.bsf
AssociativeDramCache.bdf	AssociativeDramCache.bdf
AssociativeDramCache.bsf	AssociativeDramCache.bsf
BusRequestLogic.bsf	BusRequestLogic.bsf
BusRequestLogic.vhd	BusRequestLogic.vhd
CPU_DMA_Mux.bsf	CPU_DMA_Mux.bsf
CPU_DMA_Mux.vhd	CPU_DMA_Mux.vhd
CacheData.bsf	CacheData.bsf
CacheData.qip	CacheData.qip
CacheData.v	CacheData.v
CacheDataMemory.bdf	CacheDataMemory.bdf
CacheDataMemory.bsf	CacheDataMemory.bsf
CacheDataMux.bsf	CacheDataMux.bsf
CacheDataMux.v	CacheDataMux.v
CacheDataMux.v.bak	CacheDataMux.v.bak
CacheData_Associative.bdf	CacheData_Associative.bdf
CacheData_Associative.bsf	CacheData_Associative.bsf
CacheEnabledDramController.bsf	CacheEnabledDramController.bsf
CacheEnabledDramController.vhd	CacheEnabledDramController.vhd
CachedData_Associative.bsf	CachedData_Associative.bsf
CachedData_Associative.qip	CachedData_Associative.qip
CachedData_Associative.v	CachedData_Associative.v
CachedDramController.bdf	CachedDramController.bdf
CachedDramController.bsf	CachedDramController.bsf
CanBus.bdf	CanBus.bdf
CanBus.bsf	CanBus.bsf
ClockGen.bsf	ClockGen.bsf
ClockGen.cmp	ClockGen.cmp
ClockGen.ppf	ClockGen.ppf
ClockGen.qip	ClockGen.qip
ClockGen.sip	ClockGen.sip
ClockGen.spd	ClockGen.spd
ClockGen.vhd	ClockGen.vhd
ClockGen_sim.f	ClockGen_sim.f
ClockGenerator.cmp	ClockGenerator.cmp
ClockGenerator.ppf	ClockGenerator.ppf
ClockGenerator.qip	ClockGenerator.qip
ClockPLL.cmp	ClockPLL.cmp
ClockPLL.ppf	ClockPLL.ppf
ClockPLL.qip	ClockPLL.qip
ColourPallette_2PortRam.bsf	ColourPallette_2PortRam.bsf
ColourPallette_2PortRam.cmp	ColourPallette_2PortRam.cmp
ColourPallette_2PortRam.mif	ColourPallette_2PortRam.mif
ColourPallette_2PortRam.qip	ColourPallette_2PortRam.qip
ColourPallette_2PortRam.vhd	ColourPallette_2PortRam.vhd
DMAController.bdf	DMAController.bdf
DMAController.bsf	DMAController.bsf
DataMapper68k.vhd	DataMapper68k.vhd
Dram.bdf	Dram.bdf
Dram.bsf	Dram.bsf
DramCache.bdf	DramCache.bdf
DramCache.bsf	DramCache.bsf
Dtack_Generator.bsf	Dtack_Generator.bsf
Dtack_Generator_Verilog.bsf	Dtack_Generator_Verilog.bsf
Dtack_Generator_Verilog.v	Dtack_Generator_Verilog.v
Dtack_Generator_Verilog.v.bak	Dtack_Generator_Verilog.v.bak
GraphicsController_Verilog.bsf	GraphicsController_Verilog.bsf
GraphicsController_Verilog.v	GraphicsController_Verilog.v
GraphicsFrameBufferMemory.bdf	GraphicsFrameBufferMemory.bdf
GraphicsFrameBufferMemory.bsf	GraphicsFrameBufferMemory.bsf
GraphicsLCD_Controller_Verilog.bsf	GraphicsLCD_Controller_Verilog.bsf
GraphicsLCD_Controller_verilog.v	GraphicsLCD_Controller_verilog.v
HexTo7SegmentDisplay.vhd	HexTo7SegmentDisplay.vhd
IDE68k - Getting Started.pdf	IDE68k - Getting Started.pdf
IIC_SPI_Interface.bdf	IIC_SPI_Interface.bdf

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Last commit message

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hyperterminal/hyperterminal

.gitignore