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Add a simulated jetson file that access data over the simulated I2C bus, waits a while and sends the 10.5 all ok signal, then waits a little longer to send a randomly generated benchmark result packet.
Add a simulated jetson file that access data over the simulated I2C bus, waits a while and sends the 10.5 all ok signal, then waits a little longer to send a randomly generated benchmark result packet.