Hi,
I have a question, what are the steps to perform to run the CANopen master on an embedded CPU (STM32 in my case). Is that easily feasible: has somebody realized that before?
We have 4 STM32 based processor boards of which one should act as the CANopen master node. We have requirements on having LSS, futher some low speed request responses between the master and slave nodes (all initiated by the master), without any realtime or throughput requirements. Further the required messages sized are small (<= 8 bytes) .
Br
Carl.
Hi,
I have a question, what are the steps to perform to run the CANopen master on an embedded CPU (STM32 in my case). Is that easily feasible: has somebody realized that before?
We have 4 STM32 based processor boards of which one should act as the CANopen master node. We have requirements on having LSS, futher some low speed request responses between the master and slave nodes (all initiated by the master), without any realtime or throughput requirements. Further the required messages sized are small (<= 8 bytes) .
Br
Carl.