This repository is used to store custom Codex skills that I write and maintain.
verilog-rtl-workflow/: A skill for Verilog RTL tasks, covering requirement analysis, architecture planning, RTL implementation, testbench creation, linting, and simulation.
- Each skill lives in its own directory.
- Each skill should include a
SKILL.mdfile as its main entry point. - Templates, scripts, and reference materials should stay inside the corresponding skill directory.
More custom skills will be added to this repository over time using the same structure.