docs: document RTL wrapper parameter support#1
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- rtl-wrapper.md: new "Verilog module parameters" section covering the TOML [parameters] table, Python-kwarg override precedence, p_* emission on Instance, and propagation into generator template substitution and [ports.*] params. - cv32e40p-example.md: add a [parameters] table demonstrating the new override path, and drop the stale "Parameters aren't set by the wrapper" caveat. Requires chipflow-lib PR #162.
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Summary
rtl-wrapper.mdcovering the TOML[parameters]table, Python-kwarg override precedence,p_*emission onInstance, and propagation into generator template substitution /[ports.*] params{name}substitution.cv32e40p-example.mdto demonstrate[parameters]with the core's PULP / FPU / counter knobs, and drop the stale "Parameters aren't set by the wrapper" caveat.Pairs with chipflow-lib PR ChipFlow/chipflow-lib#162, which adds the parameter support these docs describe.
Test plan
rtl-wrapper.mdandcv32e40p-example.mdin a Markdown viewer; confirm formatting.[parameters]code examples against the chipflow-lib implementation once #162 lands.