FPGA Mandelbrot Set on Digilent Basys3 Xilinx Artix 7 (Not finished)

Mandelbrot set visualization

I will try make Cornell University ECE 5760: Laboratory 3 Mandelbrot set visualization. http://people.ece.cornell.edu/land/courses/ece5760/LABS/s2019/lab3_mandelbrot.html

Lectures:

Math

Calculations are performed using floating point

2^0 => Exponent = 'd127 = 'h7f

Mantissa = [ ( 1-2^(-126) ) ; 0.5 ]

Name		Name	Last commit message	Last commit date
Latest commit History 9 Commits
Matlab		Matlab
7segment.v		7segment.v
7segment_tb.v		7segment_tb.v
Basys3_Master.xdc		Basys3_Master.xdc
README.md		README.md
UART_Loopback_module.v		UART_Loopback_module.v
UART_Loopback_tb.v		UART_Loopback_tb.v
UART_RX.v		UART_RX.v
UART_TX.v		UART_TX.v
blockram.v		blockram.v
clock_divider_param.v		clock_divider_param.v
clock_divider_param_tb.v		clock_divider_param_tb.v
clock_enable_param.v		clock_enable_param.v
clock_enable_tb.v		clock_enable_tb.v
com_to_mem_FSM_hex.v		com_to_mem_FSM_hex.v
com_to_mem_module.v		com_to_mem_module.v
com_to_mem_tb.v		com_to_mem_tb.v
debounce_switch.v		debounce_switch.v
horizontal_counter.v		horizontal_counter.v
multiply.v		multiply.v
multiply_tb.v		multiply_tb.v
mux.v		mux.v
mux_tb.v		mux_tb.v
pattern_gen.v		pattern_gen.v
pattern_gen_tb.v		pattern_gen_tb.v
summ.v		summ.v
summ_tb.v		summ_tb.v
top.v		top.v
top_tb.v		top_tb.v
vertical_counter.v		vertical_counter.v
vga_module.v		vga_module.v