perf(compiler): optimize x86 u256 mul with bmi2 adx#428
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zoowii merged 17 commits intoDTVMStack:mainfrom Apr 13, 2026
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perf(compiler): optimize x86 u256 mul with bmi2 adx#428zoowii merged 17 commits intoDTVMStack:mainfrom
zoowii merged 17 commits intoDTVMStack:mainfrom
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Pull request overview
This PR improves x86_64 EVM U256 MUL codegen by detecting adx/bmi2 support from the host feature string and selecting a dedicated ADX+BMI2 lowering path that uses MULX plus ADCX/ADOX carry chains.
Changes:
- Add host feature detection for
adxandbmi2in the x86 feature string. - Split
lowerEvmU256MulExpr()into legacy and ADX+BMI2 implementations. - Introduce helpers for emitting
MULX,ADCX,ADOX, and carry-chain setup/collection.
Reviewed changes
Copilot reviewed 3 out of 3 changed files in this pull request and generated 1 comment.
| File | Description |
|---|---|
| src/compiler/target/x86/x86lowering.h | Declares new helpers and the legacy vs ADX lowering split for U256 MUL. |
| src/compiler/target/x86/x86lowering.cpp | Implements ADX+BMI2 lowering using MULX + ADCX/ADOX scheduling and gates it on subtarget features. |
| src/compiler/context.cpp | Extends host x86 feature-string construction to include adx and bmi2 as optional features. |
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⚡ Performance Regression Check Results✅ Performance Check Passed (interpreter)Performance Benchmark Results (threshold: 25%)
Summary: 194 benchmarks, 0 regressions ✅ Performance Check Passed (multipass)Performance Benchmark Results (threshold: 25%)
Summary: 194 benchmarks, 0 regressions |
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Pull request overview
Copilot reviewed 5 out of 5 changed files in this pull request and generated 2 comments.
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Align with PR DTVMStack#428 to eliminate cross-PR merge conflicts on the shared table row. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Align with PR DTVMStack#428 to eliminate cross-PR merge conflicts on the shared table row. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Align with PR DTVMStack#428 to eliminate cross-PR merge conflicts on the shared table row. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Align with PR DTVMStack#428 to eliminate cross-PR merge conflicts on the shared table row. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Align with PR DTVMStack#428 to eliminate cross-PR merge conflicts on the shared table row. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
- Update change doc file count to match actual PR diff - Add comment clarifying EVMJIT-only scope per reviewer feedback Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
The shared table caused merge conflicts across concurrent PRs since every PR modified the same line. Each change doc is self-contained in its subdirectory; the table was redundant. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Align with PR DTVMStack#428 to eliminate cross-PR merge conflicts on the shared table row. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Summary
adxandbmi2in the x86 compiler target feature stringU256 MULto a BMI2+ADX row-wiseMULX+ADCX/ADOXschedule on supported x86_64 hostsValidation
tools/format.sh checkcmake --build /home/abmcar/DTVM-mulx-adx-opt/build-perf -j 20 --target libdtvmapi.soevmc run --benchchecks againstmain; gas and output matched in all casesPerformance
Local performance was re-measured with two distinct runtime 256-bit operands so the benchmark exercises the generic non-square
U256 MULpath.generic-mul-once182 ns183 ns+0.55%generic-mul-loop-64502 ns543 ns+7.55%generic-mul-loop-2551228 ns1372 ns+10.50%The single-shot case stays close to noise, but the hot generic MUL loop shows a stable improvement of about
8%to10%.Notes