GitHub - Dampish0/VHDL-pwm-controller: A school project to design a pwm controller for a fpga.

Dampish0 / VHDL-pwm-controller Public

A school project to design a pwm controller for a fpga.

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Name		Name	Last commit message	Last commit date
Latest commit History 7 Commits
db		db
incremental_db		incremental_db
output_files		output_files
pll_altera		pll_altera
pll_altera_sim		pll_altera_sim
simulation/modelsim		simulation/modelsim
.gitattributes		.gitattributes
c5_pin_model_dump.txt		c5_pin_model_dump.txt
dc_disp_ctrl.vhd		dc_disp_ctrl.vhd
dc_disp_ctrl.vhd.bak		dc_disp_ctrl.vhd.bak
key_ctrl.vhd		key_ctrl.vhd
key_ctrl.vhd.bak		key_ctrl.vhd.bak
lab72.qpf		lab72.qpf
lab72.zip		lab72.zip
pll_altera.bsf		pll_altera.bsf
pll_altera.cmp		pll_altera.cmp
pll_altera.ppf		pll_altera.ppf
pll_altera.qip		pll_altera.qip
pll_altera.sip		pll_altera.sip
pll_altera.spd		pll_altera.spd
pll_altera.vhd		pll_altera.vhd
pll_altera_sim.f		pll_altera_sim.f
pwm_ctrl.vhd		pwm_ctrl.vhd
pwm_ctrl.vhd.bak		pwm_ctrl.vhd.bak
pwm_module_top.qsf		pwm_module_top.qsf
pwm_module_top.qws		pwm_module_top.qws
pwm_module_top.vhd		pwm_module_top.vhd
pwm_module_top.vhd.bak		pwm_module_top.vhd.bak
pwm_module_top_nativelink_simulation.rpt		pwm_module_top_nativelink_simulation.rpt
reset_ctrl_rtl.vhd		reset_ctrl_rtl.vhd
sdc_constraints.sdc		sdc_constraints.sdc
sdc_constraints.sdc.bak		sdc_constraints.sdc.bak
serial_ctrl.vhd		serial_ctrl.vhd
serial_ctrl.vhd.bak		serial_ctrl.vhd.bak
serial_uart_rtl.vhd		serial_uart_rtl.vhd
serial_uart_rtl.vhd.bak		serial_uart_rtl.vhd.bak
startup_reset.vhd		startup_reset.vhd
testbench_pkg.vhd		testbench_pkg.vhd
testbench_top.vhd		testbench_top.vhd
testbench_top.vhd.bak		testbench_top.vhd.bak
xd.txt		xd.txt