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unrecoverable Code crash x310, Fpga exceptio while rx capture - uhd 3.15.0 - IOError: Block ctrl (CE_01_Port_40) no response packet - #321

@ilayni

Description

@ilayni

Issue Description

running
linux; GNU C++ version 5.4.0 20160609; Boost_105800; UHD_3.15.0.HEAD-0-gaea0e2de
and doing rx capture with 4 channels with timed command i get the following
Exception EnvironmentError: IOError: Block ctrl (CE_01_Port_40) no response packet - AssertionError: bool(buff)
in uint64_t ctrl_iface_impl<_endianness>::wait_for_ack(bool, double) [with uhd::endianness_t _endianness = (uhd::endianness_t)0u; uint64_t = long unsigned int]
at /home/gig/uhd/host/lib/rfnoc/ctrl_iface.cpp:151

Setup Details

linux; GNU C++ version 5.4.0 20160609; Boost_105800; UHD_3.15.0.HEAD-0-gaea0e2de
and doing rx capture with 4 channels 2 twinrx

Expected Behavior

capture with no isssue

Actual Behaviour

FPGA exception

Steps to reproduce the problem

recv with 4 channels with time commands

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