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feat(test-emu): add ESP32-C3 RISC-V QEMU support#90

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zackees merged 2 commits intomainfrom
feat/qemu-esp32c3-riscv
Apr 18, 2026
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feat(test-emu): add ESP32-C3 RISC-V QEMU support#90
zackees merged 2 commits intomainfrom
feat/qemu-esp32c3-riscv

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@zackees zackees commented Apr 18, 2026

Summary

Extends fbuild test-emu --emulator qemu (and fbuild deploy --to emu) to
cover the RISC-V ESP32 family in addition to the existing Xtensa support.
This unblocks FastLED's CI migration off Docker onto the native
fbuild test-emu runner for ESP32-C3 parts.

  • Xtensa (qemu-system-xtensa): esp32, esp32s3 (existing, unchanged)
  • RISC-V (qemu-system-riscv32): esp32c3, esp32c6, esp32h2 (new)

Closes #85.

What changed

  • fbuild-packages::toolchain::esp_qemu grew a shared EspQemuArch enum
    and a generic EspQemu package handle. The existing EspQemuXtensa
    wrapper keeps its public API; a new EspQemuRiscv32 wrapper ships the
    RISC-V variant. Same upstream release tag (esp-develop-9.2.2-20250817),
    archive stem differs (qemu-riscv32-softmmu-...). SHA256s pulled from
    the upstream release for all five host targets (Windows mingw, Linux
    x86_64/aarch64, macOS x86_64/aarch64). New FBUILD_QEMU_RISCV32_PATH
    env override mirrors the Xtensa one.
  • fbuild-daemon::handlers::emulator:
    • is_qemu_supported_esp32_mcu now delegates to EspQemuArch::for_mcu,
      which accepts C3/C6/H2 and rejects S2/P4.
    • New resolve_esp_qemu_for_mcu helper picks the right binary based on
      MCU and replaces the previous hard-coded EspQemuXtensa::new calls
      in deploy_qemu and QemuRunner::run.
    • select_runner error messages updated to list both arches.
  • fbuild-deploy::esp32::build_qemu_args needed no functional change —
    it already emits -machine <mcu> / driver=timer.<mcu>.timg, which
    matches what qemu-system-riscv32 expects for C3/C6/H2. The doc comment
    was updated to reflect the expanded MCU set. PSRAM branch is a no-op on
    RISC-V parts.
  • README emulator support matrix, auto-detection rules, QEMU notes, and a
    sample [env:esp32c3] block updated.

Test plan

  • cargo build --release in fbuild root builds cleanly
  • cargo test --release -p fbuild-packages --lib esp_qemu7 passing
    (new: arch_for_mcu_maps_xtensa_and_riscv,
    find_qemu_binary_direct_bin_riscv, plus existing xtensa variants)
  • cargo test --release -p fbuild-daemon --lib handlers::emulator
    32 passing, 0 failures including:
    • select_runner_explicit_qemu_accepts_esp32c3
    • select_runner_explicit_qemu_accepts_esp32c6
    • select_runner_explicit_qemu_accepts_esp32h2
    • select_runner_explicit_qemu_rejects_esp32s2
    • is_qemu_supported_esp32_mcu_accepts_riscv
    • is_qemu_supported_esp32_mcu_rejects_unsupported (s2, p4, atmega328p)
  • End-to-end smoke: built an examples/Blink sketch for esp32c3 in
    FastLED via fbuild build -e esp32c3 (150.8s cold), then invoked
    fbuild test-emu --emulator qemu --environment esp32c3. The
    qemu-system-riscv32 bundle was auto-downloaded, the C3 firmware
    booted into the arduino-esp32 bootloader + app, hit setup()/loop(),
    and streamed serial output. No "unsupported MCU" error. The RMT
    peripheral subsequently timed out inside showPixels() — that's
    expected under QEMU (RMT is not fully modeled) and outside the
    scope of this PR, which is purely about making the runner
    reachable for C3/C6/H2.
  • CI (Windows / Linux / macOS runners) — pending this PR

Confidence

  • C3 runner wired end-to-end and verified locally on Windows x86_64.
  • C6 / H2 added for free since they share the RISC-V path. Unit tests
    exercise select_runner and package URL synthesis; a hardware-equivalent
    smoke run was only done for C3.
  • Cross-host: SHA256s taken from the upstream release manifest. The macOS
    and Linux bundles are downloaded on-demand; fbuild will refuse the
    install if the SHA doesn't match.

🤖 Generated with Claude Code

zackees and others added 2 commits April 17, 2026 21:09
Extend `fbuild test-emu --emulator qemu` to cover the RISC-V ESP32 family
in addition to the existing Xtensa (ESP32 / ESP32-S3) support. This
unblocks FastLED's CI migration off Docker onto the native `fbuild
test-emu` runner for C3/C6/H2 parts.

Changes:

- `fbuild-packages::toolchain::esp_qemu` grows a generic `EspQemu` handle
  plus a shared `EspQemuArch` enum (`Xtensa` / `Riscv32`). The existing
  `EspQemuXtensa` wrapper keeps the same public API; a new
  `EspQemuRiscv32` wrapper ships the RISC-V variant.
  * URL pattern and release tag are identical to the Xtensa build
    (`esp-develop-9.2.2-20250817`, `qemu-riscv32-softmmu-...`).
  * SHA256 checksums verified from the upstream Espressif QEMU release
    for all five host targets (mingw, linux x86_64/aarch64, macOS
    x86_64/aarch64).
  * New `FBUILD_QEMU_RISCV32_PATH` override env var mirrors the
    Xtensa one.
  * ESP-IDF tools fallback walks `tools/qemu-riscv32/*` in addition
    to `tools/qemu-xtensa/*`.
- `fbuild-daemon::handlers::emulator`:
  * `is_qemu_supported_esp32_mcu` now accepts `esp32c3`, `esp32c6`,
    `esp32h2` via `EspQemuArch::for_mcu`. `esp32s2` remains unsupported
    (no upstream machine).
  * New `resolve_esp_qemu_for_mcu` helper selects the right binary
    based on MCU and replaces the previous hard-coded
    `EspQemuXtensa::new` calls in both `deploy_qemu` and `QemuRunner`.
  * `select_runner` error messages updated to list both arches.
- `fbuild-deploy::esp32::build_qemu_args`: doc-comment now documents
  the expanded MCU set. No functional change required — the function
  already emits `-machine <mcu>` / `driver=timer.<mcu>.timg` which
  matches what qemu-system-riscv32 expects for C3/C6/H2. PSRAM branch
  is a no-op on RISC-V parts (they have no PSRAM).
- README: emulator support matrix + QEMU notes + sample `[env:esp32c3]`
  block updated.

Tests:
- 7 passing in `fbuild-packages::toolchain::esp_qemu::tests`
  (arch_for_mcu, find_qemu_binary direct/nested for both arches,
  Windows iconv hydration)
- 3 new `select_runner_explicit_qemu_accepts_esp32{c3,c6,h2}` plus
  `select_runner_explicit_qemu_rejects_esp32s2` — all passing in
  `fbuild-daemon::handlers::emulator::tests`
- `is_qemu_supported_esp32_mcu_accepts_riscv` new; the rejection test
  now guards s2 + p4

Closes #85.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
…m stash

Two test fns (prepare_avr8js_script_writes_into_cache_dir and
avr8js_cache_marker_points_to_package_json) were pulled in through a
stash merge but reference functions that don't exist on this branch.
Removing them is purely additive relative to origin/main.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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📒 Files selected for processing (5)
  • README.md
  • crates/fbuild-daemon/src/handlers/emulator.rs
  • crates/fbuild-deploy/src/esp32.rs
  • crates/fbuild-packages/src/toolchain/esp_qemu.rs
  • crates/fbuild-packages/src/toolchain/mod.rs
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@zackees zackees merged commit 39e7dcc into main Apr 18, 2026
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test-emu: add ESP32-C3 (RISC-V) QEMU support

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