FIR-Filter

Description

Project Structure:

• ./dc - Design Compiler synthesis
• ./docs - Algorithms and datapath diagram
• ./matlab - Coefficient and data input generation, also serves as the golden verification reference
• ./qsim_dc - Final simulation, post-synthesis
• ./rtl - Verilog code for the FIR filter

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Simple Start

A Simple FIR Filter

• Code written in RTL Verilog
• Verified by ModelSim and Formal methods
• Synthesizable code style
• Synthesized using Design Compiler