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Merged
jorgesg82 merged 7 commits into from
Feb 14, 2026
Merged

Feat/spi+dma #68

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76a2043
fix(HardFault): Fix incorrect usage of pointer
FoniksFox Feb 8, 2026
c3f6879
feat(spi+dma): Remove spi and some dma things from runes, etc.
FoniksFox Feb 8, 2026
40cc60e
Merge remote-tracking branch 'origin/main' into feat/spi+dma
jorgesg82 Feb 14, 2026
8434bef
Merge branch 'main' into feat/spi+dma
jorgesg82 Feb 14, 2026
b4312d1
fix(spi): declare SPI3 DMA handles in MSP
jorgesg82 Feb 14, 2026
789fb94
fix(HardFault): Fix incorrect usage of pointer
FoniksFox Feb 8, 2026
18da723
feat(spi+dma): Remove spi and some dma things from runes, etc.
FoniksFox Feb 14, 2026
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60 changes: 10 additions & 50 deletions Core/Src/Runes/Runes.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3,8 +3,6 @@
DMA_HandleTypeDef hdma_adc1;
DMA_HandleTypeDef hdma_adc2;
DMA_HandleTypeDef hdma_adc3;
DMA_HandleTypeDef hdma_spi3_rx;
DMA_HandleTypeDef hdma_spi3_tx;
DMA_HandleTypeDef hdma_i2c2_rx;
DMA_HandleTypeDef hdma_i2c2_tx;
DMA_HandleTypeDef hdma_fmac_preload;
Expand Down Expand Up @@ -33,7 +31,6 @@ extern TIM_HandleTypeDef htim24;
UART_HandleTypeDef huart1;
UART_HandleTypeDef huart2;
UART_HandleTypeDef huart3;
SPI_HandleTypeDef hspi3;
FDCAN_HandleTypeDef hfdcan1;
FMAC_HandleTypeDef hfmac;

Expand Down Expand Up @@ -67,29 +64,6 @@ unordered_map<FDCAN_HandleTypeDef*, FDCAN::Instance*> FDCAN::handle_to_fdcan = {

#endif

/************************************************
* Communication-SPI
***********************************************/
#ifdef HAL_SPI_MODULE_ENABLED

SPI::Instance SPI::instance3 = {
.SCK = &PC10,
.MOSI = &PC12,
.MISO = &PC11,
.SS = &PD3,
.hspi = &hspi3,
.instance = SPI3,
.hdma_tx = DMA::Stream::DMA1Stream5,
.hdma_rx = DMA::Stream::DMA1Stream6,
.baud_rate_prescaler = SPI_BAUDRATEPRESCALER_256,
.mode = SPI_MODE_MASTER,
.use_DMA = false
};

SPI::Peripheral SPI::spi3 = SPI::Peripheral::peripheral3;

unordered_map<SPI::Peripheral, SPI::Instance*> SPI::available_spi = {{SPI::spi3, &SPI::instance3}};
#endif
/************************************************
* Communication-UART
***********************************************/
Expand Down Expand Up @@ -225,30 +199,16 @@ vector<uint32_t> channels1 = {};
vector<uint32_t> channels2 = {};
vector<uint32_t> channels3 = {};

ADC::InitData init_data1(
ADC1,
ADC_RESOLUTION_16B,
ADC_EXTERNALTRIG_LPTIM1_OUT,
channels1,
DMA::Stream::DMA1Stream0,
"ADC 1"
);
ADC::InitData init_data2(
ADC2,
ADC_RESOLUTION_16B,
ADC_EXTERNALTRIG_LPTIM2_OUT,
channels2,
DMA::Stream::DMA1Stream1,
"ADC 2"
);
ADC::InitData init_data3(
ADC3,
ADC_RESOLUTION_12B,
ADC_EXTERNALTRIG_LPTIM3_OUT,
channels3,
DMA::Stream::DMA1Stream2,
"ADC 3"
);
ST_LIB::DMA_Domain::Instance dma_adc1 = {hdma_adc1};
ST_LIB::DMA_Domain::Instance dma_adc2 = {hdma_adc2};
ST_LIB::DMA_Domain::Instance dma_adc3 = {hdma_adc3};

ADC::InitData init_data1(ADC1, ADC_RESOLUTION_16B, ADC_EXTERNALTRIG_LPTIM1_OUT,
channels1, &dma_adc1, "ADC 1");
ADC::InitData init_data2(ADC2, ADC_RESOLUTION_16B, ADC_EXTERNALTRIG_LPTIM2_OUT,
channels2, &dma_adc2, "ADC 2");
ADC::InitData init_data3(ADC3, ADC_RESOLUTION_12B, ADC_EXTERNALTRIG_LPTIM3_OUT,
channels3, &dma_adc3, "ADC 3");

ADC::Peripheral ADC::peripherals[3] = {
ADC::Peripheral(&hadc1, lptim1, init_data1),
Expand Down
130 changes: 5 additions & 125 deletions Core/Src/stm32h7xx_hal_msp.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -31,10 +31,6 @@ extern DMA_HandleTypeDef hdma_fmac_preload;
extern DMA_HandleTypeDef hdma_fmac_read;
extern DMA_HandleTypeDef hdma_fmac_write;

extern DMA_HandleTypeDef hdma_spi3_rx;

extern DMA_HandleTypeDef hdma_spi3_tx;

/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */

Expand Down Expand Up @@ -644,125 +640,10 @@ void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) {
}
}

/**
* @brief SPI MSP Initialization
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) {
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
if (hspi->Instance == SPI3) {
/* USER CODE BEGIN SPI3_MspInit 0 */

/* USER CODE END SPI3_MspInit 0 */

/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI3;
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
Error_Handler();
}

/* Peripheral clock enable */
__HAL_RCC_SPI3_CLK_ENABLE();

__HAL_RCC_GPIOC_CLK_ENABLE();
/**SPI3 GPIO Configuration
PC10 ------> SPI3_SCK
PC11 ------> SPI3_MISO
PC12 ------> SPI3_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);

/* SPI3 DMA Init */
/* SPI3_RX Init */
hdma_spi3_rx.Instance = DMA1_Stream5;
hdma_spi3_rx.Init.Request = DMA_REQUEST_SPI3_RX;
hdma_spi3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_spi3_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_spi3_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_spi3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_spi3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_spi3_rx.Init.Mode = DMA_NORMAL;
hdma_spi3_rx.Init.Priority = DMA_PRIORITY_LOW;
hdma_spi3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
hdma_spi3_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
if (HAL_DMA_Init(&hdma_spi3_rx) != HAL_OK) {
Error_Handler();
}

__HAL_LINKDMA(hspi, hdmarx, hdma_spi3_rx);

/* SPI3_TX Init */
hdma_spi3_tx.Instance = DMA1_Stream6;
hdma_spi3_tx.Init.Request = DMA_REQUEST_SPI3_TX;
hdma_spi3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_spi3_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_spi3_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_spi3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_spi3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_spi3_tx.Init.Mode = DMA_NORMAL;
hdma_spi3_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_spi3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
hdma_spi3_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
if (HAL_DMA_Init(&hdma_spi3_tx) != HAL_OK) {
Error_Handler();
}

__HAL_LINKDMA(hspi, hdmatx, hdma_spi3_tx);

/* SPI3 interrupt Init */
HAL_NVIC_SetPriority(SPI3_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(SPI3_IRQn);
/* USER CODE BEGIN SPI3_MspInit 1 */
/* USER CODE END SPI3_MspInit 1 */
}
}

/**
* @brief SPI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) {
if (hspi->Instance == SPI3) {
/* USER CODE BEGIN SPI3_MspDeInit 0 */

/* USER CODE END SPI3_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SPI3_CLK_DISABLE();

/**SPI3 GPIO Configuration
PC10 ------> SPI3_SCK
PC11 ------> SPI3_MISO
PC12 ------> SPI3_MOSI
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12);

/* SPI3 DMA DeInit */
HAL_DMA_DeInit(hspi->hdmarx);
HAL_DMA_DeInit(hspi->hdmatx);

/* SPI3 interrupt DeInit */
HAL_NVIC_DisableIRQ(SPI3_IRQn);
/* USER CODE BEGIN SPI3_MspDeInit 1 */

/* USER CODE END SPI3_MspDeInit 1 */
}
}

/**
* @brief TIM_PWM MSP Initialization
* This function configures the hardware resources used in this example
/**
* @brief TIM_PWM MSP Initialization
* This function configures the hardware resources used in
* this example
* @param htim_pwm: TIM_PWM handle pointer
* @retval None
*/
Expand Down Expand Up @@ -1289,8 +1170,7 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) {
HAL_NVIC_DisableIRQ(TIM24_IRQn);
/* USER CODE BEGIN TIM24_MspDeInit 1 */

/* USER CODE END TIM24_MspDeInit 1 */
}
/* USER CODE END TIM24_MspDeInit 1 */ }
}

/**
Expand Down
119 changes: 2 additions & 117 deletions Core/Src/stm32h7xx_it.c
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Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -71,9 +71,6 @@ extern FMAC_HandleTypeDef hfmac;
extern LPTIM_HandleTypeDef hlptim1;
extern LPTIM_HandleTypeDef hlptim2;
extern LPTIM_HandleTypeDef hlptim3;
extern DMA_HandleTypeDef hdma_spi3_rx;
extern DMA_HandleTypeDef hdma_spi3_tx;
extern SPI_HandleTypeDef hspi3;
extern FDCAN_HandleTypeDef hfdcan1;
/*
Externs for calltrace
Expand Down Expand Up @@ -151,7 +148,7 @@ void hardfault_flash_write(
if (HAL_FLASH_Program(
FLASH_TYPEPROGRAM_FLASHWORD,
addr_hard_fault + offset,
(uint32_t*)block
(uintptr_t)block
) != HAL_OK) {
__BKPT(0);
}
Expand All @@ -167,7 +164,7 @@ void hardfault_flash_write(
if (HAL_FLASH_Program(
FLASH_TYPEPROGRAM_FLASHWORD,
addr_metadata + offset,
(uint32_t*)block
(uintptr_t)block
) != HAL_OK) {
__BKPT(0);
}
Expand Down Expand Up @@ -436,120 +433,8 @@ void EXTI1_IRQHandler(void) {
/* USER CODE END EXTI1_IRQn 1 */
}

/**
* @brief This function handles DMA1 stream0 global interrupt.
*/
void DMA1_Stream0_IRQHandler(void) {
/* USER CODE BEGIN DMA1_Stream0_IRQn 0 */

/* USER CODE END DMA1_Stream0_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
/* USER CODE BEGIN DMA1_Stream0_IRQn 1 */

/* USER CODE END DMA1_Stream0_IRQn 1 */
}

/**
* @brief This function handles DMA1 stream1 global interrupt.
*/
void DMA1_Stream1_IRQHandler(void) {
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */

/* USER CODE END DMA1_Stream1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc2);
/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */

/* USER CODE END DMA1_Stream1_IRQn 1 */
}

/**
* @brief This function handles DMA1 stream2 global interrupt.
*/
void DMA1_Stream2_IRQHandler(void) {
/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */

/* USER CODE END DMA1_Stream2_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc3);
/* USER CODE BEGIN DMA1_Stream2_IRQn 1 */

/* USER CODE END DMA1_Stream2_IRQn 1 */
}

/**
* @brief This function handles DMA1 stream3 global interrupt.
*/
void DMA1_Stream3_IRQHandler(void) {
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */

/* USER CODE END DMA1_Stream3_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_i2c2_rx);
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */

/* USER CODE END DMA1_Stream3_IRQn 1 */
}

/**
* @brief This function handles DMA1 stream4 global interrupt.
*/
void DMA1_Stream4_IRQHandler(void) {
/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */

/* USER CODE END DMA1_Stream4_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_i2c2_tx);
/* USER CODE BEGIN DMA1_Stream4_IRQn 1 */

/* USER CODE END DMA1_Stream4_IRQn 1 */
}

/**
* @brief This function handles DMA1 stream5 global interrupt.
*/
void DMA1_Stream5_IRQHandler(void) {
/* USER CODE BEGIN DMA1_Stream5_IRQn 0 */

/* USER CODE END DMA1_Stream5_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_spi3_rx);
/* USER CODE BEGIN DMA1_Stream5_IRQn 1 */

/* USER CODE END DMA1_Stream5_IRQn 1 */
}

/**
* @brief This function handles DMA1 stream6 global interrupt.
*/
void DMA1_Stream6_IRQHandler(void) {
/* USER CODE BEGIN DMA1_Stream6_IRQn 0 */

/* USER CODE END DMA1_Stream6_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_spi3_tx);
/* USER CODE BEGIN DMA1_Stream6_IRQn 1 */

/* USER CODE END DMA1_Stream6_IRQn 1 */
}

/** @brief DMA fmac configuration (hardcoded the handler, this normally is generated by the IDE)
*/
void DMA2_Stream0_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma_fmac_preload); }

void DMA2_Stream1_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma_fmac_write); }

void DMA2_Stream2_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma_fmac_read); }

void FMAC_IRQHandler(void) { HAL_FMAC_IRQHandler(&hfmac); }

/**
* @brief This function handles SPI3 global interrupt.
*/
void SPI3_IRQHandler(void) {
/* USER CODE BEGIN SPI3_IRQn 0 */

/* USER CODE END SPI3_IRQn 0 */
HAL_SPI_IRQHandler(&hspi3);
/* USER CODE BEGIN SPI3_IRQn 1 */

/* USER CODE END SPI3_IRQn 1 */
}

/**
* @brief This function handles Ethernet global interrupt.
*/
Expand Down