Post your benchmark here 📊 — datapoints, A/Bs, cold→warm curves #208
Replies: 7 comments
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A/Bs from the same box, one knob each:
Research row (routing approximation, NOT for the main table): ROUTE_J=2 ROUTE_M=1 cache-aware routing -> 3.09 tok/s @ 92% hit, 15.3% expert substitution, MMLU-200 A/ indistinguishable from true routing (details in #161). Trail: #120 -> #160 -> #215 -> PR #270. Won't catch Zac's 6.84 with two cards and a disk, but per-GPU it's a fight. :) |
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DGX Spark / GB10 — stock top-8 vs CACHE_ROUTE (+ O_DIRECT disk)Two-tier discipline: stock full top-8 vs experimental CACHE_ROUTE. Metric is decode tok/s (generation window), not overall wall tok/s. Why two tiers
Quality A/B (limited — not full coli bench)Protocol: SCORE log-likelihood · HellaSwag · n=20 · seed 1234 · same request file · full K=8.
Caveat: n=20 only. Primes multi-turn still produced correct first-20 list (eyeball). Prefer larger greedy-token agreement set for ROUTE_J/M defaults. Supports default off. Vs EXPERT_BUDGET (blind drop): CR is the principled middle path — substitute toward resident experts inside top-M (arXiv:2412.00099), not drop by gate weight alone. Connects to expert-specialization (#207): which experts are safe to swap. Links
Happy to extend with greedy-token agreement on a small reasoning set (not just primes) when the box is free — that should help tune |
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Independent repro — thank you (@ebootheee)This is exactly the cross-arch confirmation that was needed.
Quality read: agree 100% — at n=200, ±~3.5 pp noise means no detectable difference, not “CR helps.” That is already a strong statement: ~15% expert substitution did not measurably dent MMLU. Full bench / Discipline: also agree these stay off the main true-routing table (research rows only). Same two-tier rule we use on Spark: stock top-8 vs experimental CACHE_ROUTE; never mix Tier-C CUDA stacks into a “CR alone” row. Upstream status: the routing-side path is already landed as an official opt-in (default off) in PR #199 ( @JustVugg — +1 to “research flag” framing: big README warning, substitution rate on the result line, benchmark rows separated. Happy to help fold any remaining docs/flags with the #215 / #270 stack if useful. Notes updated: https://github.com/VincentMarquez/glm52-gb10-colibri (QUALITY + NUMBERS). |
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Windows 11 native — GLM-5.2 744B int4 — RTX 5070 Ti + Core Ultra 9 185H + 32 GB RAMSetup: MinGW-w64 build, NVMe Gen4, CPU-only AVX-VNNI matmul + CUDA dense/attention offload via runtime DLL ( Decode throughput — progressive optimization (32-token decode, DRAFT=0)
Total: 3.2–4.3× over stock. Disk I/O reduced 8× (65.9s → 8.4s). Full configPer-token breakdown (accurate, from non-pipe2 run to avoid overlap artifacts)
Key findings
What didn't work (documented for the record)
Hardware details
Full diagnostic report with raw profiles, memory hierarchy analysis, and ranked optimization recommendations: |
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3.6 tok/s on AMD EPYC 7713, 96 cpu avx2, 1 TB RAM for model, 1 TB RAM for full expert loaded
Best run: Ref: #234 Please let me know if you think I can tune this any further. |
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6× RTX 5090 full stack, current dev: 5.2 tok/s end-to-end through HTTP/SSE, TTFT 0.43 sThe strictest measurement we've taken of this rig: client-side, streaming over the OpenAI SSE API through an SSH tunnel — every layer of the real serving stack included, nothing engine-side about it. Hardware: dual Xeon Silver 4510 (24C/48T, AVX-512 VNNI, 2 NUMA nodes) · 251 GB DDR5 · 6× RTX 5090 32 GB · NVMe Six consecutive 96-token turns (client-measured SSE chunk timing):
Three things the curve shows:
One bug found while measuring: after the recent telemetry merges, the server's |
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Full-residency decode on 6× RTX 5090 is CPU-bound, not GPU-bound — a direct overlap-window measurementFollowing up on the earlier 5.2 tok/s datapoint with a mechanism result that surprised me. I instrumented The GPU side of a token's experts costs ~3.8 s of wall time; the CPU side costs 44.5 s. The six 5090s finish their 9,276-expert share and then idle, waiting on the CPU to grind through the ~90 RAM-tier experts each token routes to (AVX-512 VNNI, 1–4 rows each). Independent confirmation from SM sampling during decode: 1.1% mean utilization. The cards are not the bottleneck and never were — at S=1 there simply isn't enough GPU work, and what work exists is dwarfed by the CPU tail. Consequences for where speed lives on this class of host:
The |
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This is the home for benchmark datapoints (they used to live in Issues — new ones belong here).
Template (same rigor as the README table):
What makes a datapoint great: an A/B (one knob changed), a cold→warm curve, or a config nobody has tried (see the README table for covered ground — first-of-a-kind hardware always gets a row). Negative results are welcome: "X did not help on my box" with numbers has saved this project from wrong turns at least four times.
Current table highlights to beat: 6.84 tok/s (6×5090 full residency) · 2.24 (M5 Max Metal tuned) · 1.23 (Gen5 NVMe + 5090) · 1.10 (Strix Halo) · 0.5 (native Windows warm).
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