The code implements an SPI communication module with clock generation and data transmission. It sets up a verification environment using classes for transactions, data generation, driver, monitor, and scoreboard. The top-level test bench module does the verification, simulating an SPI communication system and validating the accuracy of data transmission.
KushagraYADAV/SPI-Communication-System-Verification-using-System-Verilog
Folders and files
| Name | Name | Last commit date | ||
|---|---|---|---|---|