This is my project during my industrial training on IC physical design
In this project a new design of comparator is designed with the help of Full adder which are the basic building block of ALU and ALU is a basic functioning unit of a microprocessor. In the world of technology it has become essential to develop various new design methodologies to reduce the power and area consumption. In this paper comparator are developed using various designs of full adder. This will reduce the power of the comparator design.
The Comparator is a very basic and useful arithmetic component of digital systems. There are several approaches for designing 2-bit comparators, each with different operating speed, power consumption, and circuit complexity.
(1)A basic full adder has three inputs and two outputs which are sum and carry. The logic circuit of this full adder can be implemented with the help of XOR gate, AND gates and OR gates. The logic for sum requires XOR gate while the logic for carry requires AND, OR gates. (2)This full adder consists of two XOR gates and one 2:1 multiplexer. The output from first XOR gate acts as select line for the multiplexer. (3)Unlike the basic full adder it has three AND gates.