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Commit 69ec1d6

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Merge 10.6 into 10.11
2 parents f4d203c + d00e0f7 commit 69ec1d6

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mysys/crc32/crc32c_x86.cc

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -25,12 +25,6 @@
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#else
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# include <cpuid.h>
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# ifdef __APPLE__ /* AVX512 states are not enabled in XCR0 */
28-
# elif __GNUC__ >= 15
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# define TARGET "pclmul,avx10.1,vpclmulqdq"
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# define USE_VPCLMULQDQ __attribute__((target(TARGET)))
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# elif __GNUC__ >= 14 || (defined __clang_major__ && __clang_major__ >= 18)
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# define TARGET "pclmul,evex512,avx512f,avx512dq,avx512bw,avx512vl,vpclmulqdq"
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# define USE_VPCLMULQDQ __attribute__((target(TARGET)))
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# elif __GNUC__ >= 11 || (defined __clang_major__ && __clang_major__ >= 9)
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/* clang 8 does not support _xgetbv(), which we also need */
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# define TARGET "pclmul,avx512f,avx512dq,avx512bw,avx512vl,vpclmulqdq"
@@ -213,7 +207,7 @@ USE_VPCLMULQDQ
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static unsigned crc32_avx512(unsigned crc, const char *buf, size_t size,
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const crc32_tab &tab)
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{
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const __m512i crc_in = _mm512_castsi128_si512(_mm_cvtsi32_si128(~crc)),
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const __m512i crc_in = _mm512_zextsi128_si512(_mm_cvtsi32_si128(~crc)),
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b512 = _mm512_broadcast_i32x4(_mm_load_epi32(tab.b512));
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__m128i crc_out;
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__m512i lo;

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