[JitDiff X64] [EgorBo] Use safe Span.Slice loop pattern in Enumerable.FillIn ...

[MihuBot]

Job completed in 2 minutes 22 seconds (remote runner delay: 0 seconds).
dotnet/runtime#127427

Main commit: dotnet/runtime@932247a
PR commit: EgorBo/runtime-1@99929e9

Diffs

Found 83 files with textual diffs.

Summary of Code Size diffs:
(Lower is better)

Total bytes of base: 46194252
Total bytes of diff: 46194279
Total bytes of delta: 27 (0.00 % of base)
Total relative delta: 0.28
    diff is a regression.
    relative diff is a regression.


Top file regressions (bytes):
          27 : System.Linq.dasm (0.00 % of base)

1 total files with Code Size differences (0 improved, 1 regressed), 259 unchanged.

Top method regressions (bytes):
          13 (13.00 % of base) : System.Linq.dasm - System.Linq.Enumerable:FillIncrementing[short](System.Span`1[short],short) (FullOpts)
           5 (5.32 % of base) : System.Linq.dasm - System.Linq.Enumerable:FillIncrementing[byte](System.Span`1[byte],byte) (FullOpts)
           4 (4.49 % of base) : System.Linq.dasm - System.Linq.Enumerable:FillIncrementing[int](System.Span`1[int],int) (FullOpts)
           3 (3.09 % of base) : System.Linq.dasm - System.Linq.Enumerable:FillIncrementing[double](System.Span`1[double],double) (FullOpts)
           2 (2.15 % of base) : System.Linq.dasm - System.Linq.Enumerable:FillIncrementing[long](System.Span`1[long],long) (FullOpts)

Top method regressions (percentages):
          13 (13.00 % of base) : System.Linq.dasm - System.Linq.Enumerable:FillIncrementing[short](System.Span`1[short],short) (FullOpts)
           5 (5.32 % of base) : System.Linq.dasm - System.Linq.Enumerable:FillIncrementing[byte](System.Span`1[byte],byte) (FullOpts)
           4 (4.49 % of base) : System.Linq.dasm - System.Linq.Enumerable:FillIncrementing[int](System.Span`1[int],int) (FullOpts)
           3 (3.09 % of base) : System.Linq.dasm - System.Linq.Enumerable:FillIncrementing[double](System.Span`1[double],double) (FullOpts)
           2 (2.15 % of base) : System.Linq.dasm - System.Linq.Enumerable:FillIncrementing[long](System.Span`1[long],long) (FullOpts)

5 total methods with Code Size differences (0 improved, 5 regressed), 286344 unchanged.

--------------------------------------------------------------------------------

Artifacts:

• diff-frameworks.txt (1 KB)
• ShortDiffsRegressions.md (45 KB)
• jit-diffs-pr.zip (157 MB)
• jit-diffs-main.zip (157 MB)

[MihuBot]

Top method regressions

13 (13.00 % of base) - System.Linq.Enumerable:FillIncrementing[short](System.Span`1[short],short)

 ; Assembly listing for method System.Linq.Enumerable:FillIncrementing[short](System.Span`1[short],short) (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; fully interruptible
 ; No PGO data
-; 0 inlinees with PGO data; 5 single block inlinees; 3 inlinees without PGO data
+; 0 inlinees with PGO data; 6 single block inlinees; 5 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;* V00 arg0         [V00    ] (  0,  0   )  struct (16) zero-ref    multireg-arg ld-addr-op single-def <System.Span`1[short]>
-;  V01 arg1         [V01,T03] (  6, 11   )   short  ->  rdx        
-;  V02 loc0         [V02,T00] ( 11, 35.50)   byref  ->  rdi        
-;  V03 loc1         [V03,T05] (  4,  7   )   byref  ->  rax         single-def
-;* V04 loc2         [V04    ] (  0,  0   )  simd32  ->  zero-ref    <System.Numerics.Vector`1[short]>
-;  V05 loc3         [V05,T10] (  5, 13   )  simd32  ->  mm0         ld-addr-op <System.Numerics.Vector`1[short]>
-;  V06 loc4         [V06,T11] (  2,  4.50)  simd32  ->  mm1         ld-addr-op <System.Numerics.Vector`1[short]>
-;  V07 loc5         [V07,T07] (  2,  4.50)   byref  ->  rdx         single-def
-;# V08 OutArgs      [V08    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-;  V09 tmp1         [V09,T01] (  2, 16   )     int  ->  rcx         "impSpillLclRefs"
-;* V10 tmp2         [V10    ] (  0,  0   )  simd32  ->  zero-ref    ld-addr-op "NewObj constructor temp" <System.Numerics.Vector`1[short]>
-;* V11 tmp3         [V11    ] (  0,  0   )  simd32  ->  zero-ref    "Spilling op1 side effects for HWIntrinsic"
-;* V12 tmp4         [V12    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[short]>
-;* V13 tmp5         [V13,T09] (  0,  0   )   short  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
-;* V14 tmp6         [V14    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
-;* V15 tmp7         [V15    ] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
-;* V16 tmp8         [V16    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
-;* V17 tmp9         [V17    ] (  0,  0   )   short  ->  zero-ref    "Inlining Arg"
-;* V18 tmp10        [V18    ] (  0,  0   )   short  ->  zero-ref    "Inlining Arg"
-;  V19 tmp11        [V19,T02] (  2, 16   )     int  ->  rdx         "dup spill"
-;  V20 tmp12        [V20,T08] (  2,  2   )   byref  ->  rdi         single-def "field V00._reference (fldOffset=0x0)" P-INDEP
-;  V21 tmp13        [V21,T06] (  3,  3   )     int  ->  rsi         single-def "field V00._length (fldOffset=0x8)" P-INDEP
-;* V22 tmp14        [V22    ] (  0,  0   )   byref  ->  zero-ref    single-def "field V12._reference (fldOffset=0x0)" P-INDEP
-;* V23 tmp15        [V23    ] (  0,  0   )     int  ->  zero-ref    "field V12._length (fldOffset=0x8)" P-INDEP
-;  V24 cse0         [V24,T04] (  3, 12   )     int  ->  rcx         "CSE #01: aggressive"
+;  V01 arg1         [V01,T07] (  6, 10.92)   short  ->  rdx        
+;  V02 loc0         [V02,T15] (  5, 13   )  simd32  ->  mm0         ld-addr-op <System.Numerics.Vector`1[short]>
+;  V03 loc1         [V03,T16] (  2,  4.50)  simd32  ->  mm1         ld-addr-op <System.Numerics.Vector`1[short]>
+;* V04 loc2         [V04    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op <System.Span`1[short]>
+;* V05 loc3         [V05,T13] (  0,  0   )     int  ->  zero-ref   
+;# V06 OutArgs      [V06    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
+;  V07 tmp1         [V07,T04] (  2, 15.84)   byref  ->  rsi         "impAppendStmt"
+;  V08 tmp2         [V08,T05] (  2, 15.84)     int  ->   r8         "impSpillLclRefs"
+;* V09 tmp3         [V09    ] (  0,  0   )  simd32  ->  zero-ref    ld-addr-op "NewObj constructor temp" <System.Numerics.Vector`1[short]>
+;* V10 tmp4         [V10,T14] (  0,  0   )   short  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
+;* V11 tmp5         [V11    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
+;* V12 tmp6         [V12    ] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
+;* V13 tmp7         [V13    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
+;* V14 tmp8         [V14    ] (  0,  0   )   short  ->  zero-ref    "Inlining Arg"
+;* V15 tmp9         [V15    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[short]>
+;* V16 tmp10        [V16    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[short]>
+;* V17 tmp11        [V17    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.Span`1[short]>
+;  V18 tmp12        [V18,T02] (  2, 16   )   byref  ->  rdi         "Inlining Arg"
+;  V19 tmp13        [V19,T03] (  2, 16   )     int  ->  rsi         "Inlining Arg"
+;* V20 tmp14        [V20    ] (  0,  0   )   short  ->  zero-ref    "Inlining Arg"
+;  V21 tmp15        [V21,T06] (  2, 15.84)     int  ->  rdx         "dup spill"
+;  V22 tmp16        [V22,T01] (  5, 14   )   byref  ->  rdi         "field V00._reference (fldOffset=0x0)" P-INDEP
+;  V23 tmp17        [V23,T00] (  6, 15   )     int  ->  rsi         "field V00._length (fldOffset=0x8)" P-INDEP
+;  V24 tmp18        [V24,T11] (  2,  4.96)   byref  ->  rax         single-def "field V04._reference (fldOffset=0x0)" P-INDEP
+;  V25 tmp19        [V25,T12] (  3,  2.50)     int  ->  rcx         "field V04._length (fldOffset=0x8)" P-INDEP
+;* V26 tmp20        [V26    ] (  0,  0   )   byref  ->  zero-ref    "field V15._reference (fldOffset=0x0)" P-INDEP
+;* V27 tmp21        [V27    ] (  0,  0   )     int  ->  zero-ref    "field V15._length (fldOffset=0x8)" P-INDEP
+;* V28 tmp22        [V28    ] (  0,  0   )   byref  ->  zero-ref    "field V16._reference (fldOffset=0x0)" P-INDEP
+;* V29 tmp23        [V29    ] (  0,  0   )     int  ->  zero-ref    "field V16._length (fldOffset=0x8)" P-INDEP
+;* V30 tmp24        [V30    ] (  0,  0   )   byref  ->  zero-ref    "field V17._reference (fldOffset=0x0)" P-INDEP
+;* V31 tmp25        [V31    ] (  0,  0   )     int  ->  zero-ref    "field V17._length (fldOffset=0x8)" P-INDEP
+;  V32 cse0         [V32,T10] (  3, 11.88)     int  ->   r8         "CSE #01: moderate"
+;  V33 rat0         [V33,T08] (  4, 12.38)    long  ->  rdi         "Strength reduced derived IV"
+;  V34 rat1         [V34,T09] (  4, 12.38)     int  ->  rcx         "Trip count IV"
 ;
 ; Lcl frame size = 0
 
 G_M64246_IG01:
        push     rbp
        mov      rbp, rsp
 						;; size=4 bbWeight=1 PerfScore 1.25
 G_M64246_IG02:
-       mov      eax, esi
-       lea      rax, bword ptr [rdi+2*rax]
        cmp      esi, 16
        jl       SHORT G_M64246_IG06
-						;; size=11 bbWeight=1 PerfScore 2.00
+						;; size=5 bbWeight=1 PerfScore 1.25
 G_M64246_IG03:
        vpbroadcastw ymm0, edx
        vpaddw   ymm0, ymm0, ymmword ptr [reloc @RWD00]
        vbroadcastss ymm1, dword ptr [reloc @RWD32]
-       lea      rdx, bword ptr [rax-0x20]
        align    [0 bytes for IG04]
-						;; size=27 bbWeight=0.50 PerfScore 6.25
+						;; size=23 bbWeight=0.50 PerfScore 6.00
 G_M64246_IG04:
        vmovups  ymmword ptr [rdi], ymm0
        vpaddw   ymm0, ymm0, ymm1
        add      rdi, 32
-       cmp      rdi, rdx
-       jbe      SHORT G_M64246_IG04
-						;; size=17 bbWeight=4 PerfScore 11.33
+       add      esi, -16
+       cmp      esi, 16
+       jge      SHORT G_M64246_IG04
+						;; size=20 bbWeight=4 PerfScore 12.33
 G_M64246_IG05:
        vmovd    edx, xmm0
        movsx    rdx, dx
 						;; size=8 bbWeight=0.50 PerfScore 1.12
 G_M64246_IG06:
-       cmp      rdi, rax
-       jae      SHORT G_M64246_IG08
-       align    [0 bytes for IG07]
-						;; size=5 bbWeight=1.50 PerfScore 1.88
+       mov      rax, rdi
+       mov      ecx, esi
+       test     ecx, ecx
+       je       SHORT G_M64246_IG09
+						;; size=9 bbWeight=1 PerfScore 1.75
 G_M64246_IG07:
-       movsx    rcx, dx
-       lea      edx, [rcx+0x01]
-       movsx    rdx, dx
-       mov      word  ptr [rdi], cx
-       add      rdi, 2
-       cmp      rdi, rax
-       jb       SHORT G_M64246_IG07
-						;; size=23 bbWeight=4 PerfScore 14.00
+       xor      edi, edi
+       align    [9 bytes for IG08]
+						;; size=11 bbWeight=0.50 PerfScore 0.25
 G_M64246_IG08:
+       lea      rsi, bword ptr [rax+rdi]
+       movsx    r8, dx
+       lea      edx, [r8+0x01]
+       movsx    rdx, dx
+       mov      word  ptr [rsi], r8w
+       add      rdi, 2
+       dec      ecx
+       jne      SHORT G_M64246_IG08
+						;; size=28 bbWeight=3.96 PerfScore 15.84
+G_M64246_IG09:
        vzeroupper 
        pop      rbp
        ret      
 						;; size=5 bbWeight=1 PerfScore 2.50
 RWD00  	dq	0003000200010000h, 0007000600050004h, 000B000A00090008h, 000F000E000D000Ch
 RWD32  	dd	00100010h		; 1.46939e-39
 
 
-; Total bytes of code 100, prolog size 4, PerfScore 40.33, instruction count 31, allocated bytes for code 100 (MethodHash=ec160509) for method System.Linq.Enumerable:FillIncrementing[short](System.Span`1[short],short) (FullOpts)
+; Total bytes of code 113, prolog size 4, PerfScore 42.30, instruction count 33, allocated bytes for code 113 (MethodHash=ec160509) for method System.Linq.Enumerable:FillIncrementing[short](System.Span`1[short],short) (FullOpts)
 ; ============================================================

5 (5.32 % of base) - System.Linq.Enumerable:FillIncrementing[byte](System.Span`1[byte],byte)

 ; Assembly listing for method System.Linq.Enumerable:FillIncrementing[byte](System.Span`1[byte],byte) (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; fully interruptible
 ; No PGO data
-; 0 inlinees with PGO data; 5 single block inlinees; 3 inlinees without PGO data
+; 0 inlinees with PGO data; 6 single block inlinees; 5 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;* V00 arg0         [V00    ] (  0,  0   )  struct (16) zero-ref    multireg-arg ld-addr-op single-def <System.Span`1[byte]>
-;  V01 arg1         [V01,T03] (  6, 11   )   ubyte  ->  rdx        
-;  V02 loc0         [V02,T00] ( 11, 35.50)   byref  ->  rdi        
-;  V03 loc1         [V03,T05] (  4,  7   )   byref  ->  rax         single-def
-;* V04 loc2         [V04    ] (  0,  0   )  simd32  ->  zero-ref    <System.Numerics.Vector`1[byte]>
-;  V05 loc3         [V05,T10] (  5, 13   )  simd32  ->  mm0         ld-addr-op <System.Numerics.Vector`1[byte]>
-;  V06 loc4         [V06,T11] (  2,  4.50)  simd32  ->  mm1         ld-addr-op <System.Numerics.Vector`1[byte]>
-;  V07 loc5         [V07,T07] (  2,  4.50)   byref  ->  rdx         single-def
-;# V08 OutArgs      [V08    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-;  V09 tmp1         [V09,T01] (  2, 16   )     int  ->  rcx         "impSpillLclRefs"
-;* V10 tmp2         [V10    ] (  0,  0   )  simd32  ->  zero-ref    ld-addr-op "NewObj constructor temp" <System.Numerics.Vector`1[byte]>
-;* V11 tmp3         [V11    ] (  0,  0   )  simd32  ->  zero-ref    "Spilling op1 side effects for HWIntrinsic"
-;* V12 tmp4         [V12    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[byte]>
-;* V13 tmp5         [V13,T09] (  0,  0   )   ubyte  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
-;* V14 tmp6         [V14    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
-;* V15 tmp7         [V15    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
-;* V16 tmp8         [V16    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline stloc first use temp"
-;* V17 tmp9         [V17    ] (  0,  0   )   ubyte  ->  zero-ref    "Inlining Arg"
-;* V18 tmp10        [V18    ] (  0,  0   )   ubyte  ->  zero-ref    "Inlining Arg"
-;  V19 tmp11        [V19,T02] (  2, 16   )     int  ->  rdx         "dup spill"
-;  V20 tmp12        [V20,T08] (  2,  2   )   byref  ->  rdi         single-def "field V00._reference (fldOffset=0x0)" P-INDEP
-;  V21 tmp13        [V21,T06] (  3,  3   )     int  ->  rsi         single-def "field V00._length (fldOffset=0x8)" P-INDEP
-;* V22 tmp14        [V22    ] (  0,  0   )   byref  ->  zero-ref    single-def "field V12._reference (fldOffset=0x0)" P-INDEP
-;* V23 tmp15        [V23    ] (  0,  0   )     int  ->  zero-ref    "field V12._length (fldOffset=0x8)" P-INDEP
-;  V24 cse0         [V24,T04] (  3, 12   )     int  ->  rcx         "CSE #01: aggressive"
+;  V01 arg1         [V01,T08] (  6, 10.92)   ubyte  ->  rdx        
+;  V02 loc0         [V02,T14] (  5, 13   )  simd32  ->  mm0         ld-addr-op <System.Numerics.Vector`1[byte]>
+;  V03 loc1         [V03,T15] (  2,  4.50)  simd32  ->  mm1         ld-addr-op <System.Numerics.Vector`1[byte]>
+;* V04 loc2         [V04    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op <System.Span`1[byte]>
+;* V05 loc3         [V05,T12] (  0,  0   )     int  ->  zero-ref   
+;# V06 OutArgs      [V06    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
+;  V07 tmp1         [V07,T05] (  2, 15.84)   byref  ->  rsi         "impAppendStmt"
+;  V08 tmp2         [V08,T06] (  2, 15.84)     int  ->   r8         "impSpillLclRefs"
+;* V09 tmp3         [V09    ] (  0,  0   )  simd32  ->  zero-ref    ld-addr-op "NewObj constructor temp" <System.Numerics.Vector`1[byte]>
+;* V10 tmp4         [V10,T13] (  0,  0   )   ubyte  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
+;* V11 tmp5         [V11    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
+;* V12 tmp6         [V12    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
+;* V13 tmp7         [V13    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline stloc first use temp"
+;* V14 tmp8         [V14    ] (  0,  0   )   ubyte  ->  zero-ref    "Inlining Arg"
+;* V15 tmp9         [V15    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[byte]>
+;* V16 tmp10        [V16    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[byte]>
+;* V17 tmp11        [V17    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.Span`1[byte]>
+;  V18 tmp12        [V18,T03] (  2, 16   )   byref  ->  rdi         "Inlining Arg"
+;  V19 tmp13        [V19,T04] (  2, 16   )     int  ->  rsi         "Inlining Arg"
+;* V20 tmp14        [V20    ] (  0,  0   )   ubyte  ->  zero-ref    "Inlining Arg"
+;  V21 tmp15        [V21,T07] (  2, 15.84)     int  ->  rdx         "dup spill"
+;  V22 tmp16        [V22,T02] (  5, 14   )   byref  ->  rdi         "field V00._reference (fldOffset=0x0)" P-INDEP
+;  V23 tmp17        [V23,T00] (  6, 15   )     int  ->  rsi         "field V00._length (fldOffset=0x8)" P-INDEP
+;  V24 tmp18        [V24,T11] (  2,  4.96)   byref  ->  rax         single-def "field V04._reference (fldOffset=0x0)" P-INDEP
+;  V25 tmp19        [V25,T10] (  3,  5.96)     int  ->  rcx         "field V04._length (fldOffset=0x8)" P-INDEP
+;* V26 tmp20        [V26    ] (  0,  0   )   byref  ->  zero-ref    "field V15._reference (fldOffset=0x0)" P-INDEP
+;* V27 tmp21        [V27    ] (  0,  0   )     int  ->  zero-ref    "field V15._length (fldOffset=0x8)" P-INDEP
+;* V28 tmp22        [V28    ] (  0,  0   )   byref  ->  zero-ref    "field V16._reference (fldOffset=0x0)" P-INDEP
+;* V29 tmp23        [V29    ] (  0,  0   )     int  ->  zero-ref    "field V16._length (fldOffset=0x8)" P-INDEP
+;* V30 tmp24        [V30    ] (  0,  0   )   byref  ->  zero-ref    "field V17._reference (fldOffset=0x0)" P-INDEP
+;* V31 tmp25        [V31    ] (  0,  0   )     int  ->  zero-ref    "field V17._length (fldOffset=0x8)" P-INDEP
+;  V32 cse0         [V32,T09] (  3, 11.88)     int  ->   r8         "CSE #01: moderate"
+;  V33 rat0         [V33,T01] (  5, 16.84)    long  ->  rdi         "Widened IV V05"
 ;
 ; Lcl frame size = 0
 
 G_M15822_IG01:
        push     rbp
        mov      rbp, rsp
 						;; size=4 bbWeight=1 PerfScore 1.25
 G_M15822_IG02:
-       mov      eax, esi
-       add      rax, rdi
        cmp      esi, 32
        jl       SHORT G_M15822_IG06
-						;; size=10 bbWeight=1 PerfScore 1.75
+						;; size=5 bbWeight=1 PerfScore 1.25
 G_M15822_IG03:
        vpbroadcastb ymm0, edx
        vpaddb   ymm0, ymm0, ymmword ptr [reloc @RWD00]
        vbroadcastss ymm1, dword ptr [reloc @RWD32]
-       lea      rdx, bword ptr [rax-0x20]
        align    [0 bytes for IG04]
-						;; size=27 bbWeight=0.50 PerfScore 6.25
+						;; size=23 bbWeight=0.50 PerfScore 6.00
 G_M15822_IG04:
        vmovups  ymmword ptr [rdi], ymm0
        vpaddb   ymm0, ymm0, ymm1
        add      rdi, 32
-       cmp      rdi, rdx
-       jbe      SHORT G_M15822_IG04
-						;; size=17 bbWeight=4 PerfScore 11.33
+       add      esi, -32
+       cmp      esi, 32
+       jge      SHORT G_M15822_IG04
+						;; size=20 bbWeight=4 PerfScore 12.33
 G_M15822_IG05:
        vmovd    edx, xmm0
        movzx    rdx, dl
 						;; size=7 bbWeight=0.50 PerfScore 1.12
 G_M15822_IG06:
-       cmp      rdi, rax
-       jae      SHORT G_M15822_IG08
+       mov      rax, rdi
+       mov      ecx, esi
+       xor      edi, edi
+       test     ecx, ecx
+       je       SHORT G_M15822_IG08
        align    [0 bytes for IG07]
-						;; size=5 bbWeight=1.50 PerfScore 1.88
+						;; size=11 bbWeight=1 PerfScore 2.00
 G_M15822_IG07:
-       movzx    rcx, dl
-       lea      edx, [rcx+0x01]
+       lea      rsi, bword ptr [rax+rdi]
+       movzx    r8, dl
+       lea      edx, [r8+0x01]
        movzx    rdx, dl
-       mov      byte  ptr [rdi], cl
-       inc      rdi
-       cmp      rdi, rax
-       jb       SHORT G_M15822_IG07
-						;; size=19 bbWeight=4 PerfScore 14.00
+       mov      byte  ptr [rsi], r8b
+       inc      edi
+       cmp      edi, ecx
+       jl       SHORT G_M15822_IG07
+						;; size=24 bbWeight=3.96 PerfScore 15.84
 G_M15822_IG08:
        vzeroupper 
        pop      rbp
        ret      
 						;; size=5 bbWeight=1 PerfScore 2.50
 RWD00  	dq	0706050403020100h, 0F0E0D0C0B0A0908h, 1716151413121110h, 1F1E1D1C1B1A1918h
 RWD32  	dd	20202020h		; 1.35632e-19
 
 
-; Total bytes of code 94, prolog size 4, PerfScore 40.08, instruction count 31, allocated bytes for code 94 (MethodHash=0946c231) for method System.Linq.Enumerable:FillIncrementing[byte](System.Span`1[byte],byte) (FullOpts)
+; Total bytes of code 99, prolog size 4, PerfScore 42.30, instruction count 33, allocated bytes for code 99 (MethodHash=0946c231) for method System.Linq.Enumerable:FillIncrementing[byte](System.Span`1[byte],byte) (FullOpts)
 ; ============================================================

4 (4.49 % of base) - System.Linq.Enumerable:FillIncrementing[int](System.Span`1[int],int)

 ; Assembly listing for method System.Linq.Enumerable:FillIncrementing[int](System.Span`1[int],int) (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; fully interruptible
 ; No PGO data
-; 0 inlinees with PGO data; 5 single block inlinees; 1 inlinees without PGO data
+; 0 inlinees with PGO data; 6 single block inlinees; 3 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;* V00 arg0         [V00    ] (  0,  0   )  struct (16) zero-ref    multireg-arg ld-addr-op single-def <System.Span`1[int]>
-;  V01 arg1         [V01,T01] (  7, 15   )     int  ->  registers  
-;  V02 loc0         [V02,T00] ( 11, 35.50)   byref  ->  rdi        
-;  V03 loc1         [V03,T04] (  4,  7   )   byref  ->  rax         single-def
-;* V04 loc2         [V04    ] (  0,  0   )  simd32  ->  zero-ref    <System.Numerics.Vector`1[int]>
-;  V05 loc3         [V05,T08] (  5, 13   )  simd32  ->  mm0         ld-addr-op <System.Numerics.Vector`1[int]>
-;  V06 loc4         [V06,T09] (  2,  4.50)  simd32  ->  mm1         ld-addr-op <System.Numerics.Vector`1[int]>
-;  V07 loc5         [V07,T06] (  2,  4.50)   byref  ->  rdx         single-def
-;# V08 OutArgs      [V08    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-;  V09 tmp1         [V09,T02] (  2, 16   )     int  ->  rdx         "impSpillLclRefs"
-;* V10 tmp2         [V10    ] (  0,  0   )  simd32  ->  zero-ref    ld-addr-op "NewObj constructor temp" <System.Numerics.Vector`1[int]>
-;* V11 tmp3         [V11    ] (  0,  0   )  simd32  ->  zero-ref    "Spilling op1 side effects for HWIntrinsic"
-;* V12 tmp4         [V12    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[int]>
-;* V13 tmp5         [V13    ] (  0,  0   )     int  ->  zero-ref    ld-addr-op "Inline stloc first use temp"
-;* V14 tmp6         [V14    ] (  0,  0   )     int  ->  zero-ref    "Inlining Arg"
-;* V15 tmp7         [V15    ] (  0,  0   )     int  ->  zero-ref    "Inlining Arg"
-;  V16 tmp8         [V16,T03] (  2, 16   )     int  ->  rcx         "dup spill"
-;  V17 tmp9         [V17,T07] (  2,  2   )   byref  ->  rdi         single-def "field V00._reference (fldOffset=0x0)" P-INDEP
-;  V18 tmp10        [V18,T05] (  3,  3   )     int  ->  rsi         single-def "field V00._length (fldOffset=0x8)" P-INDEP
-;* V19 tmp11        [V19    ] (  0,  0   )   byref  ->  zero-ref    single-def "field V12._reference (fldOffset=0x0)" P-INDEP
-;* V20 tmp12        [V20    ] (  0,  0   )     int  ->  zero-ref    "field V12._length (fldOffset=0x8)" P-INDEP
+;  V01 arg1         [V01,T01] (  7, 14.88)     int  ->  registers  
+;  V02 loc0         [V02,T13] (  5, 13   )  simd32  ->  mm0         ld-addr-op <System.Numerics.Vector`1[int]>
+;  V03 loc1         [V03,T14] (  2,  4.50)  simd32  ->  mm1         ld-addr-op <System.Numerics.Vector`1[int]>
+;* V04 loc2         [V04    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op <System.Span`1[int]>
+;* V05 loc3         [V05,T12] (  0,  0   )     int  ->  zero-ref   
+;# V06 OutArgs      [V06    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
+;  V07 tmp1         [V07,T05] (  2, 15.84)   byref  ->  rsi         "impAppendStmt"
+;  V08 tmp2         [V08,T06] (  2, 15.84)     int  ->  rdx         "impSpillLclRefs"
+;* V09 tmp3         [V09    ] (  0,  0   )  simd32  ->  zero-ref    ld-addr-op "NewObj constructor temp" <System.Numerics.Vector`1[int]>
+;* V10 tmp4         [V10    ] (  0,  0   )     int  ->  zero-ref    ld-addr-op "Inline stloc first use temp"
+;* V11 tmp5         [V11    ] (  0,  0   )     int  ->  zero-ref    "Inlining Arg"
+;* V12 tmp6         [V12    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[int]>
+;* V13 tmp7         [V13    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[int]>
+;* V14 tmp8         [V14    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.Span`1[int]>
+;  V15 tmp9         [V15,T03] (  2, 16   )   byref  ->  rdi         "Inlining Arg"
+;  V16 tmp10        [V16,T04] (  2, 16   )     int  ->  rsi         "Inlining Arg"
+;* V17 tmp11        [V17    ] (  0,  0   )     int  ->  zero-ref    "Inlining Arg"
+;  V18 tmp12        [V18,T07] (  2, 15.84)     int  ->   r8         "dup spill"
+;  V19 tmp13        [V19,T02] (  5, 14   )   byref  ->  rdi         "field V00._reference (fldOffset=0x0)" P-INDEP
+;  V20 tmp14        [V20,T00] (  6, 15   )     int  ->  rsi         "field V00._length (fldOffset=0x8)" P-INDEP
+;  V21 tmp15        [V21,T10] (  2,  4.96)   byref  ->  rax         single-def "field V04._reference (fldOffset=0x0)" P-INDEP
+;  V22 tmp16        [V22,T11] (  3,  2.50)     int  ->  rcx         "field V04._length (fldOffset=0x8)" P-INDEP
+;* V23 tmp17        [V23    ] (  0,  0   )   byref  ->  zero-ref    "field V12._reference (fldOffset=0x0)" P-INDEP
+;* V24 tmp18        [V24    ] (  0,  0   )     int  ->  zero-ref    "field V12._length (fldOffset=0x8)" P-INDEP
+;* V25 tmp19        [V25    ] (  0,  0   )   byref  ->  zero-ref    "field V13._reference (fldOffset=0x0)" P-INDEP
+;* V26 tmp20        [V26    ] (  0,  0   )     int  ->  zero-ref    "field V13._length (fldOffset=0x8)" P-INDEP
+;* V27 tmp21        [V27    ] (  0,  0   )   byref  ->  zero-ref    "field V14._reference (fldOffset=0x0)" P-INDEP
+;* V28 tmp22        [V28    ] (  0,  0   )     int  ->  zero-ref    "field V14._length (fldOffset=0x8)" P-INDEP
+;  V29 rat0         [V29,T08] (  4, 12.38)    long  ->  rdi         "Strength reduced derived IV"
+;  V30 rat1         [V30,T09] (  4, 12.38)     int  ->  rcx         "Trip count IV"
 ;
 ; Lcl frame size = 0
 
 G_M19063_IG01:
        push     rbp
        mov      rbp, rsp
 						;; size=4 bbWeight=1 PerfScore 1.25
 G_M19063_IG02:
-       mov      eax, esi
-       lea      rax, bword ptr [rdi+4*rax]
        cmp      esi, 8
        jl       SHORT G_M19063_IG06
-						;; size=11 bbWeight=1 PerfScore 2.00
+						;; size=5 bbWeight=1 PerfScore 1.25
 G_M19063_IG03:
        vpbroadcastd ymm0, edx
        vpaddd   ymm0, ymm0, ymmword ptr [reloc @RWD00]
        vbroadcastss ymm1, dword ptr [reloc @RWD32]
-       lea      rdx, bword ptr [rax-0x20]
        align    [0 bytes for IG04]
-						;; size=27 bbWeight=0.50 PerfScore 6.25
+						;; size=23 bbWeight=0.50 PerfScore 6.00
 G_M19063_IG04:
        vmovups  ymmword ptr [rdi], ymm0
        vpaddd   ymm0, ymm0, ymm1
        add      rdi, 32
-       cmp      rdi, rdx
-       jbe      SHORT G_M19063_IG04
-						;; size=17 bbWeight=4 PerfScore 11.33
+       add      esi, -8
+       cmp      esi, 8
+       jge      SHORT G_M19063_IG04
+						;; size=20 bbWeight=4 PerfScore 12.33
 G_M19063_IG05:
        vmovd    edx, xmm0
 						;; size=4 bbWeight=0.50 PerfScore 1.00
 G_M19063_IG06:
-       cmp      rdi, rax
-       jae      SHORT G_M19063_IG08
-       align    [0 bytes for IG07]
-						;; size=5 bbWeight=1.50 PerfScore 1.88
+       mov      rax, rdi
+       mov      ecx, esi
+       test     ecx, ecx
+       je       SHORT G_M19063_IG09
+						;; size=9 bbWeight=1 PerfScore 1.75
 G_M19063_IG07:
-       lea      ecx, [rdx+0x01]
-       mov      dword ptr [rdi], edx
-       add      rdi, 4
-       cmp      rdi, rax
-       mov      edx, ecx
-       jb       SHORT G_M19063_IG07
-						;; size=16 bbWeight=4 PerfScore 13.00
+       xor      edi, edi
+       align    [0 bytes for IG08]
+						;; size=2 bbWeight=0.50 PerfScore 0.12
 G_M19063_IG08:
+       lea      rsi, bword ptr [rax+rdi]
+       lea      r8d, [rdx+0x01]
+       mov      dword ptr [rsi], edx
+       add      rdi, 4
+       dec      ecx
+       mov      edx, r8d
+       jne      SHORT G_M19063_IG08
+						;; size=21 bbWeight=3.96 PerfScore 14.85
+G_M19063_IG09:
        vzeroupper 
        pop      rbp
        ret      
 						;; size=5 bbWeight=1 PerfScore 2.50
 RWD00  	dq	0000000100000000h, 0000000300000002h, 0000000500000004h, 0000000700000006h
 RWD32  	dd	00000008h		; 1.12104e-44
 
 
-; Total bytes of code 89, prolog size 4, PerfScore 39.21, instruction count 29, allocated bytes for code 89 (MethodHash=e2a5b588) for method System.Linq.Enumerable:FillIncrementing[int](System.Span`1[int],int) (FullOpts)
+; Total bytes of code 93, prolog size 4, PerfScore 41.06, instruction count 31, allocated bytes for code 93 (MethodHash=e2a5b588) for method System.Linq.Enumerable:FillIncrementing[int](System.Span`1[int],int) (FullOpts)
 ; ============================================================

3 (3.09 % of base) - System.Linq.Enumerable:FillIncrementing[double](System.Span`1[double],double)

 ; Assembly listing for method System.Linq.Enumerable:FillIncrementing[double](System.Span`1[double],double) (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; fully interruptible
 ; No PGO data
-; 0 inlinees with PGO data; 5 single block inlinees; 3 inlinees without PGO data
+; 0 inlinees with PGO data; 6 single block inlinees; 5 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;* V00 arg0         [V00    ] (  0,  0   )  struct (16) zero-ref    multireg-arg ld-addr-op single-def <System.Span`1[double]>
-;  V01 arg1         [V01,T05] (  7, 15   )  double  ->  registers  
-;  V02 loc0         [V02,T00] ( 11, 35.50)   byref  ->  rdi        
-;  V03 loc1         [V03,T01] (  4,  7   )   byref  ->  rax         single-def
-;* V04 loc2         [V04    ] (  0,  0   )  simd32  ->  zero-ref    <System.Numerics.Vector`1[double]>
-;  V05 loc3         [V05,T08] (  5, 13   )  simd32  ->  mm0         ld-addr-op <System.Numerics.Vector`1[double]>
-;  V06 loc4         [V06,T10] (  2,  4.50)  simd32  ->  mm1         ld-addr-op <System.Numerics.Vector`1[double]>
-;  V07 loc5         [V07,T03] (  2,  4.50)   byref  ->  rcx         single-def
-;# V08 OutArgs      [V08    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-;  V09 tmp1         [V09,T06] (  2, 16   )  double  ->  mm0         "impSpillLclRefs"
-;* V10 tmp2         [V10    ] (  0,  0   )  simd32  ->  zero-ref    ld-addr-op "NewObj constructor temp" <System.Numerics.Vector`1[double]>
-;* V11 tmp3         [V11    ] (  0,  0   )  simd32  ->  zero-ref    "Spilling op1 side effects for HWIntrinsic"
-;* V12 tmp4         [V12    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[double]>
-;* V13 tmp5         [V13    ] (  0,  0   )  double  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
-;* V14 tmp6         [V14    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
-;* V15 tmp7         [V15    ] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
-;* V16 tmp8         [V16    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
-;* V17 tmp9         [V17    ] (  0,  0   )  double  ->  zero-ref    "Inlining Arg"
-;* V18 tmp10        [V18    ] (  0,  0   )  double  ->  zero-ref    "Inlining Arg"
-;  V19 tmp11        [V19,T07] (  2, 16   )  double  ->  mm2         "dup spill"
-;  V20 tmp12        [V20,T04] (  2,  2   )   byref  ->  rdi         single-def "field V00._reference (fldOffset=0x0)" P-INDEP
-;  V21 tmp13        [V21,T02] (  3,  3   )     int  ->  rsi         single-def "field V00._length (fldOffset=0x8)" P-INDEP
-;* V22 tmp14        [V22    ] (  0,  0   )   byref  ->  zero-ref    single-def "field V12._reference (fldOffset=0x0)" P-INDEP
-;* V23 tmp15        [V23    ] (  0,  0   )     int  ->  zero-ref    "field V12._length (fldOffset=0x8)" P-INDEP
-;  V24 cse0         [V24,T09] (  2,  4.75)  double  ->  mm1         hoist "CSE #01: moderate"
+;  V01 arg1         [V01,T10] (  7, 14.88)  double  ->  registers  
+;  V02 loc0         [V02,T13] (  5, 13   )  simd32  ->  mm0         ld-addr-op <System.Numerics.Vector`1[double]>
+;  V03 loc1         [V03,T14] (  2,  4.50)  simd32  ->  mm1         ld-addr-op <System.Numerics.Vector`1[double]>
+;* V04 loc2         [V04    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op <System.Span`1[double]>
+;* V05 loc3         [V05,T09] (  0,  0   )     int  ->  zero-ref   
+;# V06 OutArgs      [V06    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
+;  V07 tmp1         [V07,T04] (  2, 15.84)   byref  ->  rdi         "impAppendStmt"
+;  V08 tmp2         [V08,T11] (  2, 15.84)  double  ->  mm0         "impSpillLclRefs"
+;* V09 tmp3         [V09    ] (  0,  0   )  simd32  ->  zero-ref    ld-addr-op "NewObj constructor temp" <System.Numerics.Vector`1[double]>
+;* V10 tmp4         [V10    ] (  0,  0   )  double  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
+;* V11 tmp5         [V11    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
+;* V12 tmp6         [V12    ] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
+;* V13 tmp7         [V13    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
+;* V14 tmp8         [V14    ] (  0,  0   )  double  ->  zero-ref    "Inlining Arg"
+;* V15 tmp9         [V15    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[double]>
+;* V16 tmp10        [V16    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[double]>
+;* V17 tmp11        [V17    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.Span`1[double]>
+;  V18 tmp12        [V18,T02] (  2, 16   )   byref  ->  rdi         "Inlining Arg"
+;  V19 tmp13        [V19,T03] (  2, 16   )     int  ->  rsi         "Inlining Arg"
+;* V20 tmp14        [V20    ] (  0,  0   )  double  ->  zero-ref    "Inlining Arg"
+;  V21 tmp15        [V21,T12] (  2, 15.84)  double  ->  mm2         "dup spill"
+;  V22 tmp16        [V22,T01] (  5, 14   )   byref  ->  rdi         "field V00._reference (fldOffset=0x0)" P-INDEP
+;  V23 tmp17        [V23,T00] (  6, 15   )     int  ->  rsi         "field V00._length (fldOffset=0x8)" P-INDEP
+;  V24 tmp18        [V24,T07] (  2,  4.96)   byref  ->  rax         single-def "field V04._reference (fldOffset=0x0)" P-INDEP
+;  V25 tmp19        [V25,T08] (  3,  2.50)     int  ->  rcx         "field V04._length (fldOffset=0x8)" P-INDEP
+;* V26 tmp20        [V26    ] (  0,  0   )   byref  ->  zero-ref    "field V15._reference (fldOffset=0x0)" P-INDEP
+;* V27 tmp21        [V27    ] (  0,  0   )     int  ->  zero-ref    "field V15._length (fldOffset=0x8)" P-INDEP
+;* V28 tmp22        [V28    ] (  0,  0   )   byref  ->  zero-ref    "field V16._reference (fldOffset=0x0)" P-INDEP
+;* V29 tmp23        [V29    ] (  0,  0   )     int  ->  zero-ref    "field V16._length (fldOffset=0x8)" P-INDEP
+;* V30 tmp24        [V30    ] (  0,  0   )   byref  ->  zero-ref    "field V17._reference (fldOffset=0x0)" P-INDEP
+;* V31 tmp25        [V31    ] (  0,  0   )     int  ->  zero-ref    "field V17._length (fldOffset=0x8)" P-INDEP
+;  V32 cse0         [V32,T15] (  2,  4.46)  double  ->  mm1         hoist "CSE #01: moderate"
+;  V33 rat0         [V33,T05] (  4, 12.38)    long  ->  rdx         "Strength reduced derived IV"
+;  V34 rat1         [V34,T06] (  4, 12.38)     int  ->  rcx         "Trip count IV"
 ;
 ; Lcl frame size = 0
 
 G_M59089_IG01:
        push     rbp
        mov      rbp, rsp
 						;; size=4 bbWeight=1 PerfScore 1.25
 G_M59089_IG02:
-       mov      eax, esi
-       lea      rax, bword ptr [rdi+8*rax]
        cmp      esi, 4
        jl       SHORT G_M59089_IG05
-						;; size=11 bbWeight=1 PerfScore 2.00
+						;; size=5 bbWeight=1 PerfScore 1.25
 G_M59089_IG03:
        vbroadcastsd ymm0, ymm0
        vaddpd   ymm0, ymm0, ymmword ptr [reloc @RWD00]
        vbroadcastsd ymm1, qword ptr [reloc @RWD32]
-       lea      rcx, bword ptr [rax-0x20]
-       align    [0 bytes for IG04]
-						;; size=26 bbWeight=0.50 PerfScore 6.75
+       align    [1 bytes for IG04]
+						;; size=23 bbWeight=0.50 PerfScore 6.62
 G_M59089_IG04:
        vmovups  ymmword ptr [rdi], ymm0
        vaddpd   ymm0, ymm0, ymm1
        add      rdi, 32
-       cmp      rdi, rcx
-       jbe      SHORT G_M59089_IG04
-						;; size=17 bbWeight=4 PerfScore 22.00
+       add      esi, -4
+       cmp      esi, 4
+       jge      SHORT G_M59089_IG04
+						;; size=20 bbWeight=4 PerfScore 23.00
 G_M59089_IG05:
-       cmp      rdi, rax
-       jae      SHORT G_M59089_IG08
-						;; size=5 bbWeight=1.50 PerfScore 1.88
+       mov      rax, rdi
+       mov      ecx, esi
+       test     ecx, ecx
+       je       SHORT G_M59089_IG08
+						;; size=9 bbWeight=1 PerfScore 1.75
 G_M59089_IG06:
        vmovsd   xmm1, qword ptr [reloc @RWD40]
+       xor      edx, edx
        align    [0 bytes for IG07]
-						;; size=8 bbWeight=0.75 PerfScore 1.50
+						;; size=10 bbWeight=0.50 PerfScore 1.12
 G_M59089_IG07:
+       lea      rdi, bword ptr [rax+rdx]
        vaddsd   xmm2, xmm0, xmm1
        vmovsd   qword ptr [rdi], xmm0
-       add      rdi, 8
-       cmp      rdi, rax
+       add      rdx, 8
+       dec      ecx
        vmovaps  xmm0, xmm2
-       jb       SHORT G_M59089_IG07
-						;; size=21 bbWeight=4 PerfScore 23.00
+       jne      SHORT G_M59089_IG07
+						;; size=24 bbWeight=3.96 PerfScore 24.75
 G_M59089_IG08:
        vzeroupper 
        pop      rbp
        ret      
 						;; size=5 bbWeight=1 PerfScore 2.50
 RWD00  	dq	0000000000000000h, 3FF0000000000000h, 4000000000000000h, 4008000000000000h
 RWD32  	dq	4010000000000000h
 RWD40  	dq	3FF0000000000000h	;            1
 
 
-; Total bytes of code 97, prolog size 4, PerfScore 60.88, instruction count 29, allocated bytes for code 97 (MethodHash=b2b9192e) for method System.Linq.Enumerable:FillIncrementing[double](System.Span`1[double],double) (FullOpts)
+; Total bytes of code 100, prolog size 4, PerfScore 62.25, instruction count 31, allocated bytes for code 100 (MethodHash=b2b9192e) for method System.Linq.Enumerable:FillIncrementing[double](System.Span`1[double],double) (FullOpts)
 ; ============================================================

2 (2.15 % of base) - System.Linq.Enumerable:FillIncrementing[long](System.Span`1[long],long)

 ; Assembly listing for method System.Linq.Enumerable:FillIncrementing[long](System.Span`1[long],long) (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; fully interruptible
 ; No PGO data
-; 0 inlinees with PGO data; 5 single block inlinees; 3 inlinees without PGO data
+; 0 inlinees with PGO data; 6 single block inlinees; 5 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;* V00 arg0         [V00    ] (  0,  0   )  struct (16) zero-ref    multireg-arg ld-addr-op single-def <System.Span`1[long]>
-;  V01 arg1         [V01,T01] (  7, 15   )    long  ->  registers  
-;  V02 loc0         [V02,T00] ( 11, 35.50)   byref  ->  rdi        
-;  V03 loc1         [V03,T04] (  4,  7   )   byref  ->  rax         single-def
-;* V04 loc2         [V04    ] (  0,  0   )  simd32  ->  zero-ref    <System.Numerics.Vector`1[long]>
-;  V05 loc3         [V05,T08] (  5, 13   )  simd32  ->  mm0         ld-addr-op <System.Numerics.Vector`1[long]>
-;  V06 loc4         [V06,T09] (  2,  4.50)  simd32  ->  mm1         ld-addr-op <System.Numerics.Vector`1[long]>
-;  V07 loc5         [V07,T06] (  2,  4.50)   byref  ->  rdx         single-def
-;# V08 OutArgs      [V08    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-;  V09 tmp1         [V09,T02] (  2, 16   )    long  ->  rdx         "impSpillLclRefs"
-;* V10 tmp2         [V10    ] (  0,  0   )  simd32  ->  zero-ref    ld-addr-op "NewObj constructor temp" <System.Numerics.Vector`1[long]>
-;* V11 tmp3         [V11    ] (  0,  0   )  simd32  ->  zero-ref    "Spilling op1 side effects for HWIntrinsic"
-;* V12 tmp4         [V12    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[long]>
-;* V13 tmp5         [V13    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
-;* V14 tmp6         [V14    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
-;* V15 tmp7         [V15    ] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
-;* V16 tmp8         [V16    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
-;* V17 tmp9         [V17    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
-;* V18 tmp10        [V18    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
-;  V19 tmp11        [V19,T03] (  2, 16   )    long  ->  rcx         "dup spill"
-;  V20 tmp12        [V20,T07] (  2,  2   )   byref  ->  rdi         single-def "field V00._reference (fldOffset=0x0)" P-INDEP
-;  V21 tmp13        [V21,T05] (  3,  3   )     int  ->  rsi         single-def "field V00._length (fldOffset=0x8)" P-INDEP
-;* V22 tmp14        [V22    ] (  0,  0   )   byref  ->  zero-ref    single-def "field V12._reference (fldOffset=0x0)" P-INDEP
-;* V23 tmp15        [V23    ] (  0,  0   )     int  ->  zero-ref    "field V12._length (fldOffset=0x8)" P-INDEP
+;  V01 arg1         [V01,T01] (  7, 14.88)    long  ->  registers  
+;  V02 loc0         [V02,T13] (  5, 13   )  simd32  ->  mm0         ld-addr-op <System.Numerics.Vector`1[long]>
+;  V03 loc1         [V03,T14] (  2,  4.50)  simd32  ->  mm1         ld-addr-op <System.Numerics.Vector`1[long]>
+;* V04 loc2         [V04    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op <System.Span`1[long]>
+;* V05 loc3         [V05,T12] (  0,  0   )     int  ->  zero-ref   
+;# V06 OutArgs      [V06    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
+;  V07 tmp1         [V07,T05] (  2, 15.84)   byref  ->  rsi         "impAppendStmt"
+;  V08 tmp2         [V08,T06] (  2, 15.84)    long  ->  rdx         "impSpillLclRefs"
+;* V09 tmp3         [V09    ] (  0,  0   )  simd32  ->  zero-ref    ld-addr-op "NewObj constructor temp" <System.Numerics.Vector`1[long]>
+;* V10 tmp4         [V10    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
+;* V11 tmp5         [V11    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
+;* V12 tmp6         [V12    ] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
+;* V13 tmp7         [V13    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
+;* V14 tmp8         [V14    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
+;* V15 tmp9         [V15    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[long]>
+;* V16 tmp10        [V16    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inlining Arg" <System.Span`1[long]>
+;* V17 tmp11        [V17    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.Span`1[long]>
+;  V18 tmp12        [V18,T03] (  2, 16   )   byref  ->  rdi         "Inlining Arg"
+;  V19 tmp13        [V19,T04] (  2, 16   )     int  ->  rsi         "Inlining Arg"
+;* V20 tmp14        [V20    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
+;  V21 tmp15        [V21,T07] (  2, 15.84)    long  ->   r8         "dup spill"
+;  V22 tmp16        [V22,T02] (  5, 14   )   byref  ->  rdi         "field V00._reference (fldOffset=0x0)" P-INDEP
+;  V23 tmp17        [V23,T00] (  6, 15   )     int  ->  rsi         "field V00._length (fldOffset=0x8)" P-INDEP
+;  V24 tmp18        [V24,T10] (  2,  4.96)   byref  ->  rax         single-def "field V04._reference (fldOffset=0x0)" P-INDEP
+;  V25 tmp19        [V25,T11] (  3,  2.50)     int  ->  rcx         "field V04._length (fldOffset=0x8)" P-INDEP
+;* V26 tmp20        [V26    ] (  0,  0   )   byref  ->  zero-ref    "field V15._reference (fldOffset=0x0)" P-INDEP
+;* V27 tmp21        [V27    ] (  0,  0   )     int  ->  zero-ref    "field V15._length (fldOffset=0x8)" P-INDEP
+;* V28 tmp22        [V28    ] (  0,  0   )   byref  ->  zero-ref    "field V16._reference (fldOffset=0x0)" P-INDEP
+;* V29 tmp23        [V29    ] (  0,  0   )     int  ->  zero-ref    "field V16._length (fldOffset=0x8)" P-INDEP
+;* V30 tmp24        [V30    ] (  0,  0   )   byref  ->  zero-ref    "field V17._reference (fldOffset=0x0)" P-INDEP
+;* V31 tmp25        [V31    ] (  0,  0   )     int  ->  zero-ref    "field V17._length (fldOffset=0x8)" P-INDEP
+;  V32 rat0         [V32,T08] (  4, 12.38)    long  ->  rdi         "Strength reduced derived IV"
+;  V33 rat1         [V33,T09] (  4, 12.38)     int  ->  rcx         "Trip count IV"
 ;
 ; Lcl frame size = 0
 
 G_M47310_IG01:
        push     rbp
        mov      rbp, rsp
 						;; size=4 bbWeight=1 PerfScore 1.25
 G_M47310_IG02:
-       mov      eax, esi
-       lea      rax, bword ptr [rdi+8*rax]
        cmp      esi, 4
        jl       SHORT G_M47310_IG06
-						;; size=11 bbWeight=1 PerfScore 2.00
+						;; size=5 bbWeight=1 PerfScore 1.25
 G_M47310_IG03:
        vpbroadcastq ymm0, rdx
        vpaddq   ymm0, ymm0, ymmword ptr [reloc @RWD00]
        vbroadcastsd ymm1, qword ptr [reloc @RWD32]
-       lea      rdx, bword ptr [rax-0x20]
        align    [0 bytes for IG04]
-						;; size=27 bbWeight=0.50 PerfScore 6.25
+						;; size=23 bbWeight=0.50 PerfScore 6.00
 G_M47310_IG04:
        vmovups  ymmword ptr [rdi], ymm0
        vpaddq   ymm0, ymm0, ymm1
        add      rdi, 32
-       cmp      rdi, rdx
-       jbe      SHORT G_M47310_IG04
-						;; size=17 bbWeight=4 PerfScore 11.33
+       add      esi, -4
+       cmp      esi, 4
+       jge      SHORT G_M47310_IG04
+						;; size=20 bbWeight=4 PerfScore 12.33
 G_M47310_IG05:
        vmovq    rdx, xmm0
 						;; size=5 bbWeight=0.50 PerfScore 1.00
 G_M47310_IG06:
-       cmp      rdi, rax
-       jae      SHORT G_M47310_IG08
-       align    [0 bytes for IG07]
-						;; size=5 bbWeight=1.50 PerfScore 1.88
+       mov      rax, rdi
+       mov      ecx, esi
+       test     ecx, ecx
+       je       SHORT G_M47310_IG09
+						;; size=9 bbWeight=1 PerfScore 1.75
 G_M47310_IG07:
-       lea      rcx, [rdx+0x01]
-       mov      qword ptr [rdi], rdx
-       add      rdi, 8
-       cmp      rdi, rax
-       mov      rdx, rcx
-       jb       SHORT G_M47310_IG07
-						;; size=19 bbWeight=4 PerfScore 13.00
+       xor      edi, edi
+       align    [0 bytes for IG08]
+						;; size=2 bbWeight=0.50 PerfScore 0.12
 G_M47310_IG08:
+       lea      rsi, bword ptr [rax+rdi]
+       lea      r8, [rdx+0x01]
+       mov      qword ptr [rsi], rdx
+       add      rdi, 8
+       dec      ecx
+       mov      rdx, r8
+       jne      SHORT G_M47310_IG08
+						;; size=22 bbWeight=3.96 PerfScore 14.85
+G_M47310_IG09:
        vzeroupper 
        pop      rbp
        ret      
 						;; size=5 bbWeight=1 PerfScore 2.50
 RWD00  	dq	0000000000000000h, 0000000000000001h, 0000000000000002h, 0000000000000003h
 RWD32  	dq	0000000000000004h
 
 
-; Total bytes of code 93, prolog size 4, PerfScore 39.21, instruction count 29, allocated bytes for code 93 (MethodHash=0c564731) for method System.Linq.Enumerable:FillIncrementing[long](System.Span`1[long],long) (FullOpts)
+; Total bytes of code 95, prolog size 4, PerfScore 41.06, instruction count 31, allocated bytes for code 95 (MethodHash=0c564731) for method System.Linq.Enumerable:FillIncrementing[long](System.Span`1[long],long) (FullOpts)
 ; ============================================================

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