[None][infra] Waive 8 failed cases for main in post-merge

[xinhe-nv]

Auto-generated Waive PR

Created by: TensorRT LLM CI Report (requested by qa@nvidia.com)
Target branch: main
Bug(s): 6084447

Waive entries added

accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[tp4-mtp_nextn=0-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True-sampler_async_worker=False] SKIP (https://nvbugs/6084447)
accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[tp4-mtp_nextn=0-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-sampler_async_worker=False] SKIP (https://nvbugs/6084447)
accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_cuda_graph_padding_4gpus[attention_dp=True-mtp_nextn=2] SKIP (https://nvbugs/6084447)
accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[tp4-mtp_nextn=0-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True-sampler_async_worker=True] SKIP (https://nvbugs/6084447)
accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[tp4-mtp_nextn=0-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-torch_compile=True-sampler_async_worker=False] SKIP (https://nvbugs/6084447)
accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[tp4-mtp_nextn=0-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False-sampler_async_worker=True] SKIP (https://nvbugs/6084447)
accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[tp4-mtp_nextn=2-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-torch_compile=False-sampler_async_worker=False] SKIP (https://nvbugs/6084447)
accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_4gpus[tp4-mtp_nextn=0-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-torch_compile=False-sampler_async_worker=False] SKIP (https://nvbugs/6084447)

---

This PR was auto-generated by TensorRT LLM CI Report. Please review the waive entries before merging.

Summary by CodeRabbit

• Tests
  • Added skip entries for specific test configurations in the accuracy test suite.

[xinhe-nv]

/bot run --stage-list ""

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No actionable comments were generated in the recent review. 🎉

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📥 Commits

Reviewing files that changed from the base of the PR and between 0466512 and 8e4fdc4.

📒 Files selected for processing (1)

• tests/integration/test_lists/waives.txt

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📝 Walkthrough

Walkthrough

Eight new skip entries were added to the test waive list for TestDeepSeekV3Lite test cases in the LLM API PyTorch accuracy tests. All entries reference the same bug ticket (https://nvbugs/6084447) and target various parameterized configurations of test_fp8_block_scales tests.

Changes

Cohort / File(s)	Summary
Test Waive List Update tests/integration/test_lists/waives.txt	Added 8 SKIP entries for TestDeepSeekV3Lite parameterized test cases with different tensor parallelism, multi-token prediction, and compilation options, all referencing bug 6084447.

Estimated code review effort

🎯 1 (Trivial) | ⏱️ ~2 minutes

Possibly related PRs

• [None][infra] Waive 4 failed cases for main in post-merge 2652 #13067: Adds SKIP entries for the same TestDeepSeekV3Lite test class with different parameterized cases and a different NVBug ID.
• [None][infra] Waive 1 failed cases for main in post-merge 2582 #12069: Modifies the same waives file adding SKIP entries for TestDeepSeekV3Lite with different test parameterizations and bug references.
• [None][infra] Waive 2 failed cases for main in post-merge #13105: Modifies the same waive list and includes an overlapping entry (test_fp8_block_scales_cuda_graph_padding_4gpus) referencing the same bug 6084447.

Suggested reviewers

• jieli-matrix
• mzweilz
• ZhanruiSunCh

🚥 Pre-merge checks | ✅ 2 | ❌ 1

❌ Failed checks (1 warning)

Check name	Status	Explanation	Resolution
Description check	⚠️ Warning	The description deviates significantly from the template structure, lacking most required sections like Description, Test Coverage, and PR Checklist, though it does explain the waive entries being added.	Add missing sections including a brief Description explaining the purpose, Test Coverage detailing how waives are verified, and complete the PR Checklist to follow the repository template.

✅ Passed checks (2 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title clearly identifies this as an infra change to waive 8 failed test cases for the main branch, directly matching the changeset.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.

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[tensorrt-cicd]

PR_Github #44343 [ run ] triggered by Bot. Commit: 8e4fdc4 Link to invocation

[tensorrt-cicd]

PR_Github #44343 [ run ] completed with state FAILURE. Commit: 8e4fdc4
/LLM/main/L0_MergeRequest_PR pipeline #34760 (Partly Tested) completed with status: 'FAILURE'

CI Report

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[xinhe-nv]

/bot run --stage-list ""

[tensorrt-cicd]

PR_Github #44370 [ run ] triggered by Bot. Commit: 4f254e8 Link to invocation

[tensorrt-cicd]

PR_Github #44370 [ run ] completed with state FAILURE. Commit: 4f254e8
/LLM/main/L0_MergeRequest_PR pipeline #34785 (Partly Tested) completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

• Please check the failed tests and fix your PR
• If you cannot view the failures, ask the CI triggerer to share details
• Once fixed, request an NVIDIA team member to trigger CI again

Link to invocation

[xinhe-nv]

/bot run --stage-list ""

[tensorrt-cicd]

PR_Github #44373 [ run ] triggered by Bot. Commit: 4f254e8 Link to invocation

[tensorrt-cicd]

PR_Github #44373 [ run ] completed with state FAILURE. Commit: 4f254e8
/LLM/main/L0_MergeRequest_PR pipeline #34788 (Partly Tested) completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

• Please check the failed tests and fix your PR
• If you cannot view the failures, ask the CI triggerer to share details
• Once fixed, request an NVIDIA team member to trigger CI again

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[xinhe-nv]

/bot run --skip-test

[tensorrt-cicd]

PR_Github #44437 [ run ] triggered by Bot. Commit: 9365608 Link to invocation

[tensorrt-cicd]

PR_Github #44437 [ run ] completed with state SUCCESS. Commit: 9365608
/LLM/main/L0_MergeRequest_PR pipeline #34845 (Partly Tested) completed with status: 'SUCCESS'

CI Report

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[xinhe-nv]

/bot reuse-pipeline

[tensorrt-cicd]

PR_Github #44556 [ reuse-pipeline ] triggered by Bot. Commit: 0d4f09c Link to invocation

[xinhe-nv]

/bot reuse-pipeline

[tensorrt-cicd]

PR_Github #44556 [ reuse-pipeline ] completed with state SUCCESS. Commit: 0d4f09c
Reusing PR_Github #44437 (Partly Tested) for commit 0d4f09c

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[tensorrt-cicd]

PR_Github #44561 [ reuse-pipeline ] triggered by Bot. Commit: a7b16bd Link to invocation

[tensorrt-cicd]

PR_Github #44561 [ reuse-pipeline ] completed with state SUCCESS. Commit: a7b16bd
Reusing PR_Github #44437 (Partly Tested) for commit a7b16bd

Link to invocation