add multi_wave_cached rms norm#113
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…ection Add rms_norm_kernel_multi_wave_cached, a single-tile RMSNorm kernel that caches inputs in registers to avoid reloading from memory. Replace the boolean static_persistent parameter with a mode parameter for explicit kernel selection: - None: heuristic selection based on tensor shape (default) - "static_persistent": rms_norm_kernel_static_persistent - "multi_wave_reload": rms_norm_kernel_multi_wave_reload - "multi_wave_cached": rms_norm_kernel_multi_wave_cached Rename kernels for consistency: - rms_norm_kernel_gather -> rms_norm_kernel_multi_wave_reload - rms_norm_kernel_gather_regs_cached -> rms_norm_kernel_multi_wave_cached Update benchmark to compare all kernel modes side-by-side per dtype.
xjmxyt
reviewed
Apr 23, 2026
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| def reference_rms_norm( |
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Should keep the same interface as src/tilegym/ops/ops.py
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/ok to test 99c6f79 |
xjmxyt
approved these changes
Apr 29, 2026
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Add
rms_norm_kernel_multi_wave_cached, a single-tile RMSNorm kernel that caches inputs in registers to avoid reloading from memory.Replace the boolean
static_persistent parameterwith amodeparameter for explicit kernel selection:rms_norm_kernel_static_persistentrms_norm_kernel_multi_wave_reloadrms_norm_kernel_multi_wave_cachedRename kernels for consistency:
Update benchmark to compare all kernel modes side-by-side per dtype.
Performance on GB200 with M = 4096
Current
do_bench_cudagraphbased performance is not reliable see #82, so I doubled checked withtorch.profiler, see 3c8de12Description
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