Google-Girls-Hackathon: Combinational Depth Predictor

Step 1: Collecting Verilog Codes from the internet

Collected the Verilog codes from various websites and also used some of my own verilog codes.

Step 2: Synthesizing the RTL Circuit using Yosys

• Synthesizing the RTL circuit to get the Fan IN, Fan OUT and Number of Gates which is used in the dataset.

yosys
read_verilog test.v
synth
stat
write_verilog output.v

• After running the code I got this output shown below.

• This is the netlist of the above synthesis

Step 3: Timing Analysis done by OpenTimer

Timing Report is obtained by OpenTimer OpenTimer helped me to find Combinational Depth and Critical Time.

read_verilog circuit.v
read_celllib cells.lib
read_sdc constraints.sdc
report_path

Step 4: Creating Dataset by collecting Values from Yosys and OpenTimer in CSV File

I am able to create a total of 1000 dataset and used in my Machine Learning Model

Step 5: Implementing The ML Model

Implemented XGBoost Regressor Model to find the Combinational Depth using the Dependent Variables (Critical Time, Gate Count, Fan_IN, Fan_OUT) I coded in Jupyter Notebook using VSCode

• After Training the XGBoost Model

• Calculated Mean Absolute Error(MAE), Mean Squared Error(MSE) & R2Score

I am successfully implemented a model in which i got a 0.954 R2Score.

• Graph of Accuracy: Predicted v/s Actual Combinational Depth

Step 6: Uploaded to GitHub