Vitis hls

actions/hls.mk

@@ -51,9 +51,14 @@ $(syn_dir): $(srcs) run_hls_script.tcl
 	@if [ ! -d "$(SNAP_ROOT)/hardware/logs" ]; then \
 		mkdir -p $(SNAP_ROOT)/hardware/logs; \
 	fi
-	@echo "   Compiling action with Vivado HLS `vivado_hls -version|head -n1|cut -d " " -f 11`"
 	@echo "   Clock period used for HLS is $(HLS_ACTION_CLOCK) ns"
-	vivado_hls -f run_hls_script.tcl > $(SNAP_ROOT)/hardware/logs/action_make.log
+	@if [ "X$(HLS_VITIS_USED)" = "XTRUE" ]; then  \
+		echo "   Compiling action with Vitis HLS `vitis_hls -version|head -n1|cut -d " " -f 11`"; \
+		vitis_hls -f run_hls_script.tcl > $(SNAP_ROOT)/hardware/logs/action_make.log; \
+	else \
+		echo "   Compiling action with Vivado HLS `vivado_hls -version|head -n1|cut -d " " -f 11`"; \
+		vivado_hls -f run_hls_script.tcl > $(SNAP_ROOT)/hardware/logs/action_make.log; \
+	fi
 	$(RM) -rf $@/systemc $@/verilog
 
 # Create symlinks for simpler access
@@ -76,29 +81,28 @@ $(SOLUTION_NAME): $(objs)
 
 # FIXME That those things are not resulting in an error is problematic.
 #      If we get critical warnings we stay away from continuing now,
-#      since that will according to our experience with vivado_hls, lead
+#      since that will according to our experience with vivado/vitis_hls, lead
 #      to strange problems later on. So let us work on fixing the design
 #      if they occur. Rather than challenging our luck.
 #
 # Check that last HLS compilation of the action was done with the same clock period. Exit if occurs.
 # Check for CRITICAL warnings and exit if those occur. Add more if needed.
 # Check for critical warnings and exit if those occur. Add more if needed.
 # Check for reserved HLS MMIO reg at offset 0x17c.
-#
+
 check: $(syn_dir)
-	@if [ X$(HLS_ACTION_CLOCK) != X$(shell grep "Setting up clock" vivado_hls.log |cut -d " " -f 12|cut -d "n" -f 1) ]; then \
-		echo " ---------------------------------------------------------- "; \
-		echo " ERROR: Action was last compiled with a different HLS clock."; \
-		echo " Please force the recompilation with a 'make clean' command";  \
-		echo " ---------------------------------------------------------- "; exit -1; \
+	@if [ "${HLS_ACTION_CLOCK}" != "${shell grep "Setting up clock" *_hls.log |cut -d " " -f 12|cut -d "n" -f 1}" ]; then \
+			echo " ERROR with Vivado/Vitis HLS. HLS Action was last compiled with a different HLS clock."; \
+			echo " Please force the recompilation with a 'make clean' command";  \
+			echo " ---------------------------------------------------------- "; exit 1; \
 	fi
 	@echo -n "   Checking for critical warnings during HLS synthesis .... "
-	@grep -A8 CRITICAL vivado_hls.log;  \
+	@grep -A8 CRITICAL *_hls.log;  \
 		test $$? = 1 
 	@echo "OK"
 	@if [ $(HLS_ACTION_CLOCK) == $(HLS_ACTION_CLOCK_DEFAULT) ]; then                \
 		echo -n "   Checking for critical timings during HLS synthesis  .... ";    \
-        	grep -A8 critical vivado_hls.log;     \
+        	grep -A8 critical *_hls.log;     \
 		if [ $$? -eq 0 ]; then \
 		  echo "------------------------------------------------------------------ "; \
                   echo "TIMING ERROR: Please correct your action code before going further"!; \
@@ -113,11 +117,11 @@ check: $(syn_dir)
 		echo "   By defining a HLS clock different than the default 5ns, the automatic checking"; \
 		echo "   of the critical timings is disabled. You need to manually check them."; \
 		echo "   FYI action was compiled with following HLS clock:"; \
-		grep "Setting up clock" vivado_hls.log ; \
+		grep "Setting up clock" *_hls.log ; \
 		echo "   --------------------------------------------------------------------------- ";    \
 		echo "   please CHECK the below list (if any) for HLS synthesis critical timing .... ";    \
 		echo "   --------------------------------------------------------------------------- ";    \
-        	grep -A8 critical vivado_hls.log ;     \
+        	grep -A8 critical *_hls.log ;     \
 		echo "   --------------------------------------------------------------------------- ";    \
 		if [ $$? -ne 0 ]; then \
 	  	  echo "OK";                                                                    \

actions/hls_decimal_mult/hw/action_decimal_mult.cpp

@@ -140,7 +140,12 @@ void hls_action(snap_membus_512_t *din_gmem,
 
 	// Host Memory AXI Lite Master Interface
 
-#pragma HLS DATA_PACK variable=act_reg
+#ifdef HLS_VITIS_USED
+       #pragma HLS AGGREGATE variable=act_reg
+#else
+       #pragma HLS DATA_PACK variable=act_reg
+#endif
+
 #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100
 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg
 

actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp

@@ -32,7 +32,7 @@
 // the application shouldn't use more interfaces than the number you have defined in Kconfig menu.
 // (extra interfaces not connected will be removed if not connected to the wrapper)
 
-#define HBM_AXI_IF_NB 12
+#define HBM_AXI_IF_NB 12 
 
 //===================================================================================//
 
@@ -835,7 +835,13 @@ void hls_action(snap_membus_1024_t *din_gmem,
   max_read_burst_length=64  max_write_burst_length=64 
 
 	// Host Memory AXI Lite Master Interface
-#pragma HLS DATA_PACK variable=act_reg
+
+	#ifdef HLS_VITIS_USED
+       #pragma HLS AGGREGATE variable=act_reg
+#else
+       #pragma HLS DATA_PACK variable=act_reg
+#endif
+
 #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100
 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg
 

actions/hls_helloworld_1024/hw/action_uppercase.cpp

@@ -96,7 +96,11 @@ void hls_action(snap_membus_1024_t *din_gmem,
  * #pragma HLS INTERFACE s_axilite port=d_ddrmem bundle=ctrl_reg offset=0x050
  */
     // Host Memory AXI Lite Master Interface - NO CHANGE BELOW
-#pragma HLS DATA_PACK variable=act_reg
+#ifdef HLS_VITIS_USED
+	#pragma HLS AGGREGATE variable=act_reg
+#else
+	#pragma HLS DATA_PACK variable=act_reg
+#endif
 #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100
 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg
 

actions/hls_helloworld_512/hw/action_uppercase.cpp

@@ -97,7 +97,11 @@ void hls_action(snap_membus_512_t *din_gmem,
  * #pragma HLS INTERFACE s_axilite port=d_ddrmem bundle=ctrl_reg offset=0x050
  */
     // Host Memory AXI Lite Master Interface - NO CHANGE BELOW
-#pragma HLS DATA_PACK variable=act_reg
+#ifdef HLS_VITIS_USED
+       #pragma HLS AGGREGATE variable=act_reg
+#else
+       #pragma HLS DATA_PACK variable=act_reg
+#endif
 #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100
 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg
 

actions/hls_helloworld_python/hw/action_uppercase.cpp

@@ -95,7 +95,11 @@ void hls_action(snap_membus_1024_t *din_gmem,
  * #pragma HLS INTERFACE s_axilite port=d_ddrmem bundle=ctrl_reg offset=0x050
  */
     // Host Memory AXI Lite Master Interface - NO CHANGE BELOW
-#pragma HLS DATA_PACK variable=act_reg
+#ifdef HLS_VITIS_USED
+       #pragma HLS AGGREGATE variable=act_reg
+#else
+       #pragma HLS DATA_PACK variable=act_reg
+#endif
 #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100
 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg
 

actions/hls_image_filter/hw/action_pixel_filter.cpp

@@ -225,8 +225,11 @@ void hls_action(snap_membus_512_t *din_gmem,
 	 * #pragma HLS INTERFACE s_axilite port=d_ddrmem bundle=ctrl_reg offset=0x050
 	 */
 		// Host Memory AXI Lite Master Interface - NO CHANGE BELOW
-
-#pragma HLS DATA_PACK variable=act_reg
+#ifdef HLS_VITIS_USED
+       #pragma HLS AGGREGATE variable=act_reg
+#else
+       #pragma HLS DATA_PACK variable=act_reg
+#endif
 #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100
 
 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg

actions/hls_memcopy_1024/hw/hw_action_memcopy_1024.cpp

@@ -257,7 +257,11 @@ void hls_action(snap_membus_1024_t *din_gmem,
 
 
 	// Host Memory AXI Lite Master Interface
-#pragma HLS DATA_PACK variable=act_reg
+#ifdef HLS_VITIS_USED
+  #pragma HLS AGGREGATE variable=act_reg
+#else
+  #pragma HLS DATA_PACK variable=act_reg
+#endif
 #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100
 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg
 

actions/hls_memcopy_512/hw/hw_action_memcopy_512.cpp

@@ -217,7 +217,11 @@ void hls_action(snap_membus_512_t *din_gmem,
 
 
 	// Host Memory AXI Lite Master Interface
-#pragma HLS DATA_PACK variable=act_reg
+#ifdef HLS_VITIS_USED
+       #pragma HLS AGGREGATE variable=act_reg
+#else
+       #pragma HLS DATA_PACK variable=act_reg
+#endif
 #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100
 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg
 

actions/hls_udp_512/tests/action_test.h → actions/hls_udp_512/hw/action_test.h

@@ -1,7 +1,6 @@
 #include <stdio.h>
-#include <iostream>
-//#define NO_SYNTH
-#include "../hw/hls_udp.h"
+//#include <iostream>
+//#include "hls_udp.h"
 
 
 #pragma pack(push)

actions/hls_udp_512/hw/eth_decode.cpp

@@ -14,11 +14,11 @@
  * limitations under the License.
  */
 
-#include "hls_udp.h"
 #include <unistd.h>
-#include "osnap_hls_if.h"
+//#include "osnap_hls_if.h"
 #include "ap_int.h"
-#include <iostream>
+//#include <iostream>
+#include "hls_udp.h"
 
 enum rcv_state_t {RCV_INIT, RCV_JF_HEADER, RCV_GOOD, RCV_BAD, RCV_IGNORE};
 

actions/hls_udp_512/hw/hls_udp.cpp

@@ -18,9 +18,10 @@
 #include <string.h>
 #include "ap_int.h"
 #include <unistd.h>
-#include "osnap_hls_if.h"
-
-#include "../tests/action_test.h"
+//#include "osnap_hls_if.h"
+//#include "hls_snap_1024.H"
+#include "hls_udp.h"
+#include "action_test.h"
 
 void process_frames(AXI_STREAM &din_eth, eth_settings_t eth_settings, eth_stat_t &eth_stat, snap_membus_512_t *dout_gmem, uint64_t out_frame_buffer_addr) {
 	#pragma HLS DATAFLOW
@@ -144,7 +145,11 @@ void hls_action(snap_membus_512_t *din_gmem,
 #pragma HLS INTERFACE s_axilite port=dout_gmem bundle=ctrl_reg offset=0x040
 
 	// Host Memory AXI Lite Master Interface - NO CHANGE BELOW
-#pragma HLS DATA_PACK variable=act_reg
+#ifdef HLS_VITIS_USED
+       #pragma HLS AGGREGATE variable=act_reg
+#else
+       #pragma HLS DATA_PACK variable=act_reg
+#endif
 #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100
 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg
 
@@ -165,6 +170,7 @@ void hls_action(snap_membus_512_t *din_gmem,
 			} else
 	process_action(din_gmem, dout_gmem, din_eth, dout_eth, act_reg);
 
+
 }
 
 //--------------------------------------------------------------------------------------//

actions/hls_udp_512/hw/hls_udp.h

@@ -21,11 +21,13 @@
 #include <string.h>
 #include <ap_int.h>
 #include <hls_stream.h>
-
+#ifdef HLS_VITIS_USED
+#include <ap_axi_sdata.h>
+#endif
 #include "hls_snap_1024.H"
 #include "action_udp.H" /* Job definition */
 
-typedef char word_t[BPERDW_1024];
+//typedef char word_t[BPERDW_512];
 //---------------------------------------------------------------------
 // This is generic. Just adapt names for a new action
 // CONTROL is defined and handled by SNAP 
@@ -36,13 +38,18 @@ typedef struct {
 	uint8_t padding[SNAP_HLS_JOBSIZE - sizeof(rx100G_job_t)];
 } action_reg;
 
+#ifdef HLS_VITIS_USED
+  //redefining the structure to get keep, user and last signals
+  typedef ap_axiu<512,1,0,0> ap_axiu_for_eth;
+#else
 // Based on https://forums.xilinx.com/t5/High-Level-Synthesis-HLS/ap-axiu-parameters/td-p/635138
-struct ap_axiu_for_eth {
+ struct ap_axiu_for_eth {
 	ap_uint<512>     data;
 	ap_uint<64>      keep;
 	ap_uint<1>       user;
 	ap_uint<1>       last;
-};
+ };
+#endif
 
 struct eth_settings_t {
 	uint64_t expected_packets;
@@ -100,7 +107,6 @@ struct packet_header_t {
 	ap_uint<8> jf_detector_type;
 	ap_uint<8> jf_header_version_type;
 };
-
 typedef hls::stream<ap_axiu_for_eth> AXI_STREAM;
 typedef hls::stream<data_packet_t> DATA_STREAM;
 

actions/hls_udp_512/hw/write_data.cpp

@@ -15,11 +15,11 @@
  */
 
 
-#include "hls_udp.h"
 #include <unistd.h>
 #include "ap_int.h"
-#include "osnap_hls_if.h"
-#include <iostream>
+//#include "osnap_hls_if.h"
+//#include <iostream>
+#include "hls_udp.h"
 
 void write_data(DATA_STREAM &in, snap_membus_512_t *dout_gmem, uint64_t out_frame_buffer_addr) {
 	data_packet_t packet_in;

actions/scripts/create_run_hls_script.sh

@@ -15,7 +15,10 @@
 ## limitations under the License.
 ##
 
-version=1.0
+version=1.1   
+# 1.0 : Creation
+# 1.1 : adding Vitis_hls support - March 2021
+
 program=`basename "$0"`
 
 # output formatting
@@ -103,7 +106,9 @@ done
 shift $((OPTIND-1))
 # now do something with $@
 
-#### TCL config script for vivado_hls #########################################
+if [ -z $HLS_VITIS_USED ]; then
+	printf "   HLS_VITIS_USED is not set\n" >&2;
+	#### TCL config script for vivado_hls #########################################
 cat <<EOF
 open_project "${directory}_${part_number}"
 
@@ -114,8 +119,8 @@ foreach file [ list ${files} ] {
   add_files \${file} -cflags "$cflags -I$snap_root/actions/include -I$snap_root/software/include -I../../../software/examples -I../include"
   add_files -tb \${file} -cflags "$cflags -DNO_SYNTH -I$snap_root/actions/include -I$snap_root/software/include -I../../../software/examples -I../include"
 }
+	open_solution "${name}"
 
-open_solution "${name}"
 set_part ${part_number}
 
 create_clock -period ${clock_period} -name default
@@ -127,3 +132,36 @@ csynth_design
 #export_design -format ip_catalog -rtl vhdl
 exit
 EOF
+	#### End of TCL config script for vivado_hls #########################################
+
+else
+if [ "X${HLS_VITIS_USED}" == "XTRUE" ]; then 
+    printf "   HLS_VITIS_USED is TRUE\n" >&2;
+    #### TCL config script for vitis_hls #########################################
+cat <<EOF
+open_project "${directory}_${part_number}"
+
+set_top ${wrapper}
+
+# Can that be a list?
+foreach file [ list ${files} ] {
+  add_files \${file} -cflags "$cflags -DHLS_VITIS_USED -I$snap_root/actions/include -I$snap_root/software/include -I../../../software/examples -I../include"
+  add_files -tb \${file} -cflags "$cflags -DHLS_VITIS_USED -DNO_SYNTH -I$snap_root/actions/include -I$snap_root/software/include -I../../../software/examples -I../include"
+}
+	open_solution -flow_target vivado "${name}"
+
+set_part ${part_number}
+
+create_clock -period ${clock_period} -name default
+config_interface -m_axi_addr64=true
+#config_rtl -reset all -reset_level low
+config_schedule -enable_dsp_full_reg=true
+
+csynth_design
+#export_design -format ip_catalog -rtl vhdl
+exit
+EOF
+#### End of TCL config script for vitis_hls #########################################
+
+fi
+fi