ARM FP16 GEMM: generic C implementation without ISA optimizations

[yuanjia111]

Hi there,

I noticed that the current FP16 GEMM implementation on ARM is based on a generic C implementation, without leveraging ISA-specific optimizations (e.g., NEON or SVE intrinsics).

Are there any plans to optimize this kernel in the future? Given that some ARM cores lack dedicated FP16 dot-product instructions or MMLA variants, I suspect this might be the primary reason for the current generic implementation. Is this assumption correct?

Thanks for your time and for maintaining this project!

[martin-frbg]

FP16 support in OpenBLAS is very new, the only ISA-specific kernels are for RISCV64 at present. There is no fixed roadmap for OpenBLAS, and lack of dedicated instructions on some cores would not prevent adding optimized FP16 BLAS kernels for others. It's just that nobody has written them so far

[yuanjia111]

Thanks for the prompt and detailed clarification! It makes perfect sense.
I understand that the lack of dedicated instructions isn't a hard blocker, and the main hurdle is simply the manpower to write the optimized kernels.
I'll go ahead and close this issue. Thanks again for your time!