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ci: fixed 'API reference' generation #17

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Merged
rodrigomelo9 merged 1 commit into from
Feb 13, 2021
Merged

ci: fixed 'API reference' generation #17

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2 changes: 1 addition & 1 deletion doc/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ man:
#---

html:
$(SPHINXBUILD) -b html $(ALLSPHINXOPTS) $(BUILDDIR)/html
PYTHONPATH=$(shell pwd)/.. $(SPHINXBUILD) -b html $(ALLSPHINXOPTS) $(BUILDDIR)/html

#---

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12 changes: 6 additions & 6 deletions doc/conf.py
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Expand Up @@ -115,12 +115,12 @@

# -- Sphinx.Ext.InterSphinx -----------------------------------------------

intersphinx_mapping = {
'python': ('https://docs.python.org/3.8/', None),
'ghdl': ('https://ghdl.github.io/ghdl', None),
'vunit': ('https://vunit.github.io', None),
'matplotlib': ('https://matplotlib.org/', None)
}
#intersphinx_mapping = {
# 'python': ('https://docs.python.org/3.8/', None),
# 'ghdl': ('https://ghdl.github.io/ghdl', None),
# 'vunit': ('https://vunit.github.io', None),
# 'matplotlib': ('https://matplotlib.org/', None)
#}

# -- Sphinx.Ext.ExtLinks --------------------------------------------------
extlinks = {
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4 changes: 2 additions & 2 deletions doc/dev.rst
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Expand Up @@ -43,8 +43,8 @@ solve the complete workflow were encapsulated into procedures
This file is compliant with Tcl 8.4 because is the oldest used by a
supported FPGA Tool (Xilinx ISE).

fpga/tool/*.py
==============
fpga/tool/<TOOL>.py
===================

A base class (``__init__.py``) was developed to provides a uniform API to be
implemented for each supported Tool.
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