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QLNI/README.md

QLNI — Quantum Lattice Node Intelligence Star History Chart

Binary Quantum Computer · Standard CPU · Zero Floating-Point Operations

Provisional Patent Filed — IP Australia · 30 March 2026 Author: Sai Kiran Bathula · Coleambally, NSW, Australia Submitted to appropriate technical authorities for review


What This Is

QLNI is a binary quantum computation system implemented on standard CPU hardware using exclusively integer arithmetic.

  • No floating-point operations
  • No GPU
  • No cryogenic quantum hardware
  • No special accelerators

Hardware used for reported results: AMD Ryzen 5 3600 VPS


Proven Results

Quantum Fundamentals

Capability Result
Quantum Superposition 50/50 probability distribution — integer only
Quantum Entanglement Bell state verified over 1,000 trials
Grover's Search (N=4) 100% success
Grover's Search (N=8) 95.5% success
Deutsch-Jozsa 3/3 correct in a single query

Integer Factoring

Method Range Result Time
Shor's Algorithm (WHT) 4–8 bit 8/8 factored
BSGS up to 32-bit 7/7 factored 0.066s total
Pollard's Rho up to 64-bit 7/7 factored 0.036s total
ECM Hybrid up to 112-bit 6/6 factored largest 92.1s
Hybrid NTT-Rho up to 128-bit 11/11 factored 128-bit in 152.9s

Total reported test coverage includes factoring results through 128-bit.
Floating-point operations across reported tests: ZERO.

RSA-100 Cracked

Step Detail
Message BINARY AI NIHA
RSA Modulus (100-bit) 444,929,981,016,498,837,277,505,825,783
Factors Recovered 661,759,090,624,369 × 672,210,071,458,147
Method Pollard's Rho (Brent variant) — integer only
Time to Crack 14.6 seconds
Private Key Derived ✅ Matches original
Message Recovered BINARY AI NIHA — exact match

Primes were generated with cryptographic PRNG and verified with 20 rounds of Miller-Rabin. The cracking function received only the public modulus and exponent.


Hybrid NTT-Rho Result

A later experimental continuation replaced the earlier bottlenecked approach with an NTT-guided hybrid Pollard Rho / ECM pipeline.

Bits Result Time
48 Factored 0.001s
56 Factored 0.003s
64 Factored 0.003s
72 Factored 0.170s
80 Factored 0.216s
88 Factored 0.792s
96 Factored 6.977s
104 Factored 26.8s
112 Factored 208.9s
120 Factored 220.7s
128 Factored 152.9s

All 11/11 semiprimes in this experiment were factored using integer arithmetic only.


One Mathematical Foundation — Multiple Applications

Application Core Operation Result
Image Codec WHT butterfly encoding/decoding 97% pixel accuracy
Language Model WHT cross-correlation 94.5% word accuracy
Image Generation Codebook + inverse WHT 98.8% at full resolution
Quantum Gates Fixed-point Hadamard Grover 100%, Deutsch-Jozsa 3/3
Integer Factoring + RSA WHT + Rho + ECM + NTT-guided navigation 128-bit in 152.9s, RSA-100 in 14.6s

Operations Audit

All reported algorithms use integer arithmetic only.

Operation Used In
Integer multiply + mod All algorithms
Integer add / subtract WHT / NTT butterfly, GCD
Bit shift Modular exponentiation, normalisation
Hash table insert / lookup Baby-Step Giant-Step
GCD (Euclidean) Factor extraction
Extended GCD Modular inverse
Miller-Rabin primality Integer modular exponentiation
Elliptic curve point add ECM
Pollard Rho walk Integer modular cycle detection
NTT butterfly Residue-spectrum navigation

Floating-point operations: ZERO
GPU: NONE
Quantum hardware: NONE


Validation

This work has been submitted to appropriate technical authorities and institutional contacts for review.


Demo & Access

No public demo is provided at this time.

A live demonstration is available only to qualified institutional researchers, government bodies, and serious investors under a signed NDA.


Patent Status

Provisional patent filed with IP Australia covering the QLNI system and related integer-arithmetic methods.


Contact

Sai Kiran Bathula
Coleambally, NSW, Australia
Binary AI (x4E49) Email- qlni.xe49@gmail.com


CONFIDENTIAL — ALL RIGHTS RESERVED
© 2026 Sai Kiran Bathula · Binary AI (x4E49)

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  1. QLNI QLNI Public

    Binary quantum computer on commodity CPU hardware using exclusively integer arithmetic. RSA-100 cracked in 14.6 seconds, zero floating-point operations, provisional patent filed.