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boards/cpu: add support for nucleo144-f746 and stm32f7#6907

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aabadie merged 4 commits intoRIOT-OS:masterfrom
haukepetersen:add_board_nucleo144-f746
May 10, 2017
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boards/cpu: add support for nucleo144-f746 and stm32f7#6907
aabadie merged 4 commits intoRIOT-OS:masterfrom
haukepetersen:add_board_nucleo144-f746

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@haukepetersen
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Almost there, but no UART output. Seems like I missed something, but can't see it right now. @aabadie: feel free to take over this PR - or wait until I am back from holiday...

@haukepetersen haukepetersen added Platform: ARM Platform: This PR/issue effects ARM-based platforms Type: new feature The issue requests / The PR implemements a new feature for RIOT State: WIP State: The PR is still work-in-progress and its code is not in its final presentable form yet labels Apr 13, 2017
@haukepetersen haukepetersen requested a review from aabadie April 13, 2017 20:32
@DipSwitch
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DipSwitch commented Apr 13, 2017 via email

@aabadie aabadie self-assigned this Apr 14, 2017
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 320K
cpuid (r) : ORIGIN = 0x1ff80050, LENGTH = 12
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this should be 0x1ff0f420 see datasheet section 41.1 page 1654

}
#endif

#endif /* STM32L4_CPU_CONF_H */
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F7

ISR_VECTORS const void *interrupt_vector[] = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M4 handlers */
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M7

@aabadie
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aabadie commented Apr 14, 2017

I allowed myself to push a couple of commits that fix a few problems (cpuid + common nucleo-144 board include). But still no UART or GPIO.

@haukepetersen
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@aabadie: thanks for the fixes! Just out of curiosity: were you able to push directly into my branch without having write access? Interesting :-)

@DipSwitch: nope, did not touch the default hardware configuration, must I?

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aabadie commented Apr 24, 2017

Just out of curiosity: were you able to push directly into my branch without having write access? Interesting :-)

This is one of the GitHub's features. When one creates a PR, there's a checkbox for allowing maintainers of a project to push someone else's branch.

@haukepetersen
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Ahh, I see, very interesting, good to know (and quite useful!) :-)

@aabadie
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aabadie commented Apr 24, 2017

Yes but this is something that we should not abuse, especially with new contributors (even though this is debatable). Otherwise I think it is useful when we want to speed things up by just fixing remaining nits or squashing just before merging. But this is not a very interesting job.

@vincent-d
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I have that board: http://www.st.com/en/evaluation-tools/32f746gdiscovery.html
So I tried to port it based on that PR. I'm also not able to have a working UART...

I found an issue with periph_clk_en and periph_clk_dis in stm32_common/cpu_common.c: AHB1 is not enabled for stm32f7. Fixing that should fix the GPIO, but it does not solve the UART issue for me.

@haukepetersen haukepetersen force-pushed the add_board_nucleo144-f746 branch from d4c2080 to 631559f Compare April 25, 2017 19:46
@haukepetersen haukepetersen added CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR and removed State: WIP State: The PR is still work-in-progress and its code is not in its final presentable form yet labels Apr 25, 2017
@haukepetersen
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Alright, after some more hours of debugging I got it to work! Should run fine now. There were actually a couple of issues: wrong flash wait cycle computation, PLL was not set as system clock, HSE was not properly enabled... But all fixed now.

@haukepetersen
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Can anyone explain to me, where the cppcheck warning comes from? I thought we got rid of any cppcheck warnings in the code base, so that this (unrelated to this PR) warnings should not happen again?

And anyway, how do we get around this false positive?

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miri64 commented Apr 26, 2017

Add a suppression comment

/* cppcheck-suppress variableScope
 * variable used in assembly-code below */

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miri64 commented Apr 26, 2017

(above the line pointed out by cppcheck).

Regarding the supposed fixing: did anyone test locally with the version of cppcheck running on Murdock?

@aabadie
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aabadie commented Apr 26, 2017

Alright, after some more hours of debugging I got it to work! Should run fine now. There were actually a couple of issues: wrong flash wait cycle computation, PLL was not set as system clock, HSE was not properly enabled... But all fixed now.

Good job ! I'll test asap

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Some nits and configuration improvements still needed. Otherwise, good job. All STM32 mcu are now supported and full Nucleo support is almost done !

FEATURES_PROVIDED += periph_uart

# load the common Makefile.features for Nucleo boards
include $(RIOTBOARD)/nucleo-common/Makefile.features
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should be nucleo144-common


#ifndef DOXYGEN
/**
* @brief Override ADC resolution values
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@name
btw, I'm wondering if those ADC definitions are required since this MCU doesn't provide the implementations for ADC ?

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No, brief is right, but the braces are not required here (since doxygen parses the enum as one type anyway)

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Then again, doesn't #ifndef DOXYGEN imply that this is NOT parsed by doxygen. In this case @brief still makes more sense, since this is a brief description, not a name.

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removed them for now.

*/

/**
* @ingroup cpu_stm32l4
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cpu_stm32f7

WEAK_DEFAULT void isr_svc(void);
WEAK_DEFAULT void isr_pendsv(void);
WEAK_DEFAULT void isr_systick(void);
/* STM32L4 specific interrupt vectors */
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STM32F7

(void*) isr_fpu
};

#if 0
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I guess this block can be removed

{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
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I would prefer to use PG9 and PG14 for this UART. Then it corresponds to the Arduino RX/TX pins. See what's done the the other nucleo144 boards.

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changed pins to PD5 and PD6

{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_B, 7),
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Same here there's a USART text printed next to CN8, I would prefer to use one the USART pins available there (probably PD6,PD5)

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cant find any more useful mapping these pins...

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use USART2, AF7 instead

FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_hwrng
FEATURES_PROVIDED += periph_timer
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For completeness, we could add some PWM configuration. Maybe it's better to add it in a follow-up PR ?

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I would prefer doing it in a follow-up

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ok

@aabadie
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aabadie commented Apr 26, 2017

I also noticed the rework of clock initialization that I think is a nice addition. Do you think it could be generalized to all STM32 ?

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aabadie commented Apr 26, 2017

Tested on board: no UART. Is there any special change required on the board or can I use the default configuration ?

break;
#elif defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4) \
|| defined(CPU_FAM_STM32L4)
|| defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32F7)
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Should be added in periph_clk_dis as well

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fixed

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indentation looks off

@haukepetersen
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I also noticed the rework of clock initialization that I think is a nice addition. Do you think it could be generalized to all STM32 ?

Yes, thats the point of it. But lets go in small steps, the next one being in #6970

@haukepetersen
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Tested on board: no UART. Is there any special change required on the board or can I use the default configuration ?

Nope, didn't touch any (HW) configuration on the board. Mine works as is with this branch.

@haukepetersen haukepetersen force-pushed the add_board_nucleo144-f746 branch from d3e24a8 to 144409c Compare May 4, 2017 08:48
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good catch -> seems there was a reason I had that block of out-commented interrupt vectors still in the the vectors file earlier... Fixed.

Also explicitly tested UART_DEV(1) and confirmed it working:

2017-05-04 10:47:23,536 - INFO # main(): This is RIOT! (Version: 2017.04-devel-916-gd3e24a-prag-add_board_nucleo144-f746)
2017-05-04 10:47:23,536 - INFO # 
2017-05-04 10:47:23,539 - INFO # Manual UART driver test application
2017-05-04 10:47:23,542 - INFO # ===================================
2017-05-04 10:47:23,547 - INFO # This application is intended for testing additional UART
2017-05-04 10:47:23,552 - INFO # interfaces, that might be defined for a board. The 'primary' UART
2017-05-04 10:47:23,558 - INFO # interface is tested implicitly, as it is running the shell...
2017-05-04 10:47:23,558 - INFO # 
2017-05-04 10:47:23,564 - INFO # When receiving data on one of the additional UART interfaces, this
2017-05-04 10:47:23,569 - INFO # data will be outputted via STDIO. So the easiest way to test an 
2017-05-04 10:47:23,575 - INFO # UART interface, is to simply connect the RX with the TX pin. Then 
2017-05-04 10:47:23,581 - INFO # you can send data on that interface and you should see the data 
2017-05-04 10:47:23,583 - INFO # being printed to STDOUT
2017-05-04 10:47:23,583 - INFO # 
2017-05-04 10:47:23,587 - INFO # NOTE: all strings need to be '\n' terminated!
2017-05-04 10:47:23,587 - INFO # 
2017-05-04 10:47:23,588 - INFO # UART INFO:
2017-05-04 10:47:23,591 - INFO # Available devices:               3
2017-05-04 10:47:23,595 - INFO # UART used for STDIO (the shell): UART_DEV(0)
2017-05-04 10:47:23,595 - INFO # 
> init 1 9600
2017-05-04 10:47:28,817 - INFO #  init 1 9600
2017-05-04 10:47:28,820 - INFO # Successfully initialized UART_DEV(1)
> send 1 n
2017-05-04 10:47:32,642 - INFO #  send 1 n
2017-05-04 10:47:32,645 - INFO # UART_DEV(1) TX: n
2017-05-04 10:47:32,648 - INFO # UART_DEV(1) RX: n\n
> send 1 blubbbar
2017-05-04 10:47:36,467 - INFO #  send 1 blubbbar
2017-05-04 10:47:36,469 - INFO # UART_DEV(1) TX: blubbbar
> 2017-05-04 10:47:36,481 - INFO #  UART_DEV(1) RX: blubbbar\n

@aabadie
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aabadie commented May 4, 2017

Had a look at the changes again. They all looks good to me now so it's time for squashing here.
I'll give another try next week (I won't have the board with me before tuesday) to see if the UART still doesn't work.

What's the version of your compiler ? (I have gcc 4.9.3) Maybe I can try another one to see if it makes a difference.

@haukepetersen
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arm-none-eabi-gcc (GNU Tools for ARM Embedded Processors) 5.4.1 20160919 (release) [ARM/embedded-5-branch revision 240496]
Copyright (C) 2015 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

@haukepetersen haukepetersen force-pushed the add_board_nucleo144-f746 branch from 144409c to b8dc85f Compare May 5, 2017 11:33
@haukepetersen haukepetersen added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label May 5, 2017
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squashed

@haukepetersen
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@vincent-d: are all your change requests fulfilled?

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Found another issue, sorry.

(void*) isr_rtc_wkup,
(void*) isr_flash,
(void*) isr_rcc,
(void*) isr_exti0,
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It seems like every other stm32 define every isr_exti* as isr_exti, gpio interrupt are crashing otherwise.

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Yes, that's correct. This change was lost when I copied in the correct isr table...

@haukepetersen haukepetersen force-pushed the add_board_nucleo144-f746 branch from b8dc85f to 17fedc7 Compare May 8, 2017 07:16
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fixed exti ISR vectors

@haukepetersen
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@aabadie: what is your verdict, are you ready to approve as well?

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aabadie commented May 10, 2017

what is your verdict, are you ready to approve as well?

I re-tested yesterday by flashing an mbed generated firmware that should print something on UART: didn't work. So there's probably something broken on the board I have.
BTW, the changes are fine here: ACK

@aabadie aabadie added CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR and removed CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels May 10, 2017
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aabadie commented May 10, 2017

Re-triggered a build on Murdock2

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aabadie commented May 10, 2017

All green: Go!

@aabadie aabadie merged commit 40de3c6 into RIOT-OS:master May 10, 2017
@haukepetersen haukepetersen deleted the add_board_nucleo144-f746 branch May 11, 2017 08:45
@aabadie aabadie modified the milestone: Release 2017.07 Jun 30, 2017
@Tenderson
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Tenderson commented Aug 20, 2017

Hi, For the BOARD=nucleo144-f767, the support for the I2C and SPI is not yet defined in there. Is there any plan for this update?

Thank you.

@haukepetersen
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We just need to find someone doing this, so feel free to port them :-)

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