WIP: pm_layered for cpu/atmega_common#8207
WIP: pm_layered for cpu/atmega_common#8207roberthartung wants to merge 1 commit intoRIOT-OS:masterfrom
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| { | ||
| mutex_lock(&lock); | ||
| #ifdef MODULE_PM_LAYERED | ||
| pm_block(PM_INVALID_ADC); |
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The define PM_INVALID_ADC defines the mode which the ADC needs to be running.
| #ifdef MODULE_PM_LAYERED | ||
| pm_block(PM_INVALID_SPI); | ||
| #endif | ||
| switch(bus) { |
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Is there a better way than a switch/case?
| /* configure as master, with given mode and clock */ | ||
| SPSR = (clk >> S2X_SHIFT); | ||
| SPCR = ((1 << SPE) | (1 << MSTR) | mode | (clk & CLK_MASK)); | ||
| //SPCR |= (1 << SPE); |
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Duplicate line... right?
| void *arg; /**< interrupt callback argument */ | ||
| uint8_t mode; /**< remember the configured mode */ | ||
| uint8_t isrs; /**< remember the interrupt state */ | ||
| int8_t num; /** < hardware timer number */ |
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This is an approach where I map the timer within RIOT to the actual hardware timer. Any better solutions?
| /** @} */ | ||
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| static inline void timer_poweroff(tim_t tim) { | ||
| switch(ctx[tim].num) { |
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Again, big switch/case
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| #ifdef MEGA_TIMER0 | ||
| if(ctx[tim].dev == MEGA_TIMER0) { | ||
| ctx[tim].num = 0; |
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Maybe there is a better/more elegant way of setting the hardware timer?
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| void uart_poweron(uart_t uart) { | ||
| switch(ctx[uart].num) { | ||
| #ifdef MEGA_UART0 |
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Do we need a differentiation if we have rx/tx enabled or not? See discussion in #7947
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Platform: AVR
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I'm not sure why I self-assigned for this... Maybe @MichelRottleuthner @kaspar030 or @haukepetersen want to take a look instead? |
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This issue has been automatically marked as stale because it has not had recent activity. It will be closed if no further activity occurs. If you want me to ignore this issue, please mark it with the "State: don't stale" label. Thank you for your contributions. |
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Stale bot did it already in reaction to your comment ;-) |
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@roberthartung: Feel free to ping me when this PR has been rebased and got into a state a review makes sense. I really would like to see the power management of the ATmega platform improved in RIOT. |
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@maribu Thanks! Will work on this as one of the next steps. Are there enough tests for pm already? I should also add my pm test to this PR:
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@MrKevinWeiss can probably answer that. |
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I haven't touch pm stuff yet in the testing. I am working on a way to do so with the HiL setup but I don't think it would be ready in time. I can however run some tests manually and can also monitor the current (I think). I think having a simple (on target) test that turns things off and on is great. You can also try failure cases where you try to turn the power off when something is held on. Or what happens when turning power on twice... That kind of thing. The easier the test is to run the easier it is to merge in. My "helping people" time is currently with the release and esp8266 PR but after I clear those away I would be happy work on how to test this. |
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This issue has been automatically marked as stale because it has not had recent activity. It will be closed if no further activity occurs. If you want me to ignore this issue, please mark it with the "State: don't stale" label. Thank you for your contributions. |
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This is a WIP PR for pm_layered in atmega_common. This has to be discussed on several parts, e.g.: