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s-barannikov and others added 5 commits November 17, 2025 00:10
This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.

Autogenerated node names start with "AMDGPUISD::", hence the changes in
the tests.

The few nodes defined in R600.td are *not* imported because TableGen
processes AMDGPU.td that doesn't include R600.td. Ideally, we would have
two sets of nodes, but that would require careful reorganization of td
files since some nodes are shared between AMDGPU/R600. Not sure if it
something worth looking into.

Some nodes fail validation, those are listed in
`AMDGPUSelectionDAGInfo::verifyTargetNode()`.

Part of llvm#119709.

Pull Request: llvm#168248
…specific relocations to strings. (llvm#168293)

This will be used in places like LLD to render them for error messages.
Symbol is already of type MCSymbolELF *.

Identified with readability-redundant-casting.
…onversions.cpp (llvm#167261)

Calling convention is irrelevant to address space verification and adds
complixity for other target triples.
@z1-cciauto z1-cciauto requested a review from a team November 17, 2025 04:06
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@z1-cciauto z1-cciauto merged commit 524efbe into amd-staging Nov 17, 2025
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@z1-cciauto z1-cciauto deleted the upstream_merge_202511162306 branch November 17, 2025 07:14
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7 participants