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951ab04
[mlir][NVVM] Add no-rollback option to NVVM lowering passes (#168477)
matthias-springer Nov 18, 2025
ea26d92
[RISCV] Remove unused argument check (NFC) (#168313)
garthlei Nov 18, 2025
485b3af
[RISCV] Reduce minimum VL needed for vslidedown.vx in RISCVVLOptimize…
lukel97 Nov 18, 2025
7354533
[CIR] X86 vector fcmp-sse vector builtins (#167125)
woruyu Nov 18, 2025
886d24d
[clang][bytecode] Fix fallthrough to switch labels (#168484)
tbaederr Nov 18, 2025
f15b756
[ORC] Remove unnecessary LLVM_ABI on function def. NFCI. (#168478)
lhames Nov 18, 2025
6886d49
[RISCV] Add an option to enable CFIInstrInserter. (#164477)
mgudim Nov 18, 2025
5327c6b
[mlir][SCF] Add pass option to deactivate pattern rollback (#168481)
matthias-springer Nov 18, 2025
a618895
[SLP] Invariant loads cannot have a memory dependency on stores. (#16…
mjbedy Nov 18, 2025
9f69321
Improve error response message parsing for DAP evaluate requests. (#1…
ashgti Nov 18, 2025
ee1abb8
[AMDGPU][clang] Fix clang driver check for multiple sanitizer argumen…
ro-i Nov 18, 2025
20795e0
[AMDGPU][SIMemoryLegalizer] Combine GFX10-11 CacheControl Classes (#1…
Pierre-vh Nov 18, 2025
beb06eb
Fixed 2 tests that failed on MacOS (#168482)
romanova-ekaterina Nov 18, 2025
603ac57
[AArch64][SME] Add support for zeroing ZT0 to CommitZASavePseudo (#16…
MacDue Nov 18, 2025
7c34848
[VPlan] Hoist loads with invariant addresses using noalias metadata. …
fhahn Nov 18, 2025
f369a53
[DAGCombiner] Fold select into partial.reduce.add operands. (#167857)
sdesmalen-arm Nov 18, 2025
542d88d
[lldb][nfc] Fix incorrect union usage in UnwindAssemblyInstEmulation …
felipepiovezan Nov 18, 2025
8603552
[MC] AsmLexer assert buffer is null-terminated at CurBuf.end() (#154972)
smilczek Nov 18, 2025
128caa1
[mlir][bufferization] Refine tensor-buffer compatibility checks (#167…
andrey-golubev Nov 18, 2025
f9256ca
[Headers][X86] Allow AVX512 masked arithmetic ss/sd intrinsics to be …
woruyu Nov 18, 2025
2ea1a09
[Headers][X86] Allow AVX512 masked arithmetic pd/ps/epi/epu intrinsic…
woruyu Nov 18, 2025
672757b
[WebAssembly] Add patterns for extadd pairwise (#167960)
badumbatish Nov 18, 2025
3ce893f
[ORC] Move DebugObjectManagerPlugin into Debugging/ELFDebugObjectPlug…
weliveindetail Nov 18, 2025
49d77d8
[X86][GlobalISel] Enable nest arguments (#165173)
e-kud Nov 18, 2025
88465af
[gn build] Port
llvmgnsyncbot Nov 18, 2025
3378ea2
[gn build] Port 3ce893f83450
llvmgnsyncbot Nov 18, 2025
8592a65
[AArch64][llvm] GICv5 instruction `GIC CDEOI` takes no operand (#167322)
jthackray Nov 18, 2025
fb829bf
[MLIR][NVVM] Add tcgen05.mma MLIR Ops (#164356)
schwarzschild-radius Nov 18, 2025
200793a
Extend MemoryEffects to Support Target-Specific Memory Locations (#14…
CarolineConcatto Nov 18, 2025
5efce73
[compiler-rt][ARM] Optimized mulsf3 and divsf3 (#168394)
statham-arm Nov 18, 2025
2432465
[VPlan] Support isa/dyn_cast from VPRecipeBase to VPIRMetadata (NFC).…
fhahn Nov 18, 2025
27231bc
[MLIR][SPIRV] Lower SPIR-V Tan/Tanh ops to LLVM intrinsics (#168419)
hankluo6 Nov 18, 2025
591c463
[LLVM][AArch64] Mark SVE integer intrinsics as speculatable. (#167915)
paulwalker-arm Nov 18, 2025
76dac58
[MLIR][NVVM] Move the docs to markdown file (#168375)
grypp Nov 18, 2025
4ecfaa6
[AArch64][GlobalISel] Add better basic legalization for llround. (#16…
davemgreen Nov 18, 2025
81da1c3
merge main into amd-staging
z1-cciauto Nov 18, 2025
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6 changes: 3 additions & 3 deletions clang/include/clang/Basic/BuiltinsX86.td
Original file line number Diff line number Diff line change
Expand Up @@ -4117,15 +4117,15 @@ let Features = "avx512f", Attributes = [NoThrow, Const, Constexpr, RequiredVecto
def selectpd_512 : X86Builtin<"_Vector<8, double>(unsigned char, _Vector<8, double>, _Vector<8, double>)">;
}

let Features = "avx512fp16", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
let Features = "avx512fp16", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
def selectsh_128 : X86Builtin<"_Vector<8, _Float16>(unsigned char, _Vector<8, _Float16>, _Vector<8, _Float16>)">;
}

let Features = "avx512bf16", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
let Features = "avx512bf16", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
def selectsbf_128 : X86Builtin<"_Vector<8, __bf16>(unsigned char, _Vector<8, __bf16>, _Vector<8, __bf16>)">;
}

let Features = "avx512f", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
let Features = "avx512f", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
def selectss_128 : X86Builtin<"_Vector<4, float>(unsigned char, _Vector<4, float>, _Vector<4, float>)">;
def selectsd_128 : X86Builtin<"_Vector<2, double>(unsigned char, _Vector<2, double>, _Vector<2, double>)">;
}
Expand Down
10 changes: 10 additions & 0 deletions clang/include/clang/Basic/DiagnosticDriverKinds.td
Original file line number Diff line number Diff line change
Expand Up @@ -129,13 +129,23 @@ def err_drv_bad_offload_arch_combo : Error<
"invalid offload arch combinations: '%0' and '%1' (for a specific processor, "
"a feature should either exist in all offload archs, or not exist in any "
"offload archs)">;
def err_drv_unsupported_option_for_offload_arch_req_feature : Error<
"'%0' option for offload arch '%1' is not currently supported "
"there. Use it with an offload arch containing '%2' instead">;
def warn_drv_unsupported_option_for_offload_arch_req_feature : Warning<
"ignoring '%0' option for offload arch '%1' as it is not currently supported "
"there. Use it with an offload arch containing '%2' instead">,
InGroup<OptionIgnored>;
def warn_drv_unsupported_option_for_target : Warning<
"ignoring '%0' option as it is not currently supported for target '%1'">,
InGroup<OptionIgnored>;
def err_drv_unsupported_option_for_target : Error<
"'%0' option is not currently supported for target '%1'">;
def warn_drv_unsupported_option_part_for_target : Warning<
"ignoring '%0' in '%1' option as it is not currently supported for target '%2'">,
InGroup<OptionIgnored>;
def err_drv_unsupported_option_part_for_target : Error<
"'%0' in '%1' option is not currently supported for target '%2'">;
def warn_drv_invalid_argument_for_flang : Warning<
"'%0' is not valid for Fortran">,
InGroup<OptionIgnored>;
Expand Down
18 changes: 18 additions & 0 deletions clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
Original file line number Diff line number Diff line change
Expand Up @@ -131,6 +131,14 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
return cir::IntType::get(getContext(), n, false);
}

static unsigned getCIRIntOrFloatBitWidth(mlir::Type eltTy) {
if (auto intType = mlir::dyn_cast<cir::IntTypeInterface>(eltTy))
return intType.getWidth();
if (auto floatType = mlir::dyn_cast<cir::FPTypeInterface>(eltTy))
return floatType.getWidth();

llvm_unreachable("Unsupported type in getCIRIntOrFloatBitWidth");
}
cir::IntType getSIntNTy(int n) {
return cir::IntType::get(getContext(), n, true);
}
Expand Down Expand Up @@ -565,6 +573,16 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
return cir::CmpOp::create(*this, loc, getBoolTy(), kind, lhs, rhs);
}

cir::VecCmpOp createVecCompare(mlir::Location loc, cir::CmpOpKind kind,
mlir::Value lhs, mlir::Value rhs) {
VectorType vecCast = mlir::cast<VectorType>(lhs.getType());
IntType integralTy =
getSIntNTy(getCIRIntOrFloatBitWidth(vecCast.getElementType()));
VectorType integralVecTy =
VectorType::get(context, integralTy, vecCast.getSize());
return cir::VecCmpOp::create(*this, loc, integralVecTy, kind, lhs, rhs);
}

mlir::Value createIsNaN(mlir::Location loc, mlir::Value operand) {
return createCompare(loc, cir::CmpOpKind::ne, operand, operand);
}
Expand Down
1 change: 1 addition & 0 deletions clang/include/clang/CIR/MissingFeatures.h
Original file line number Diff line number Diff line change
Expand Up @@ -259,6 +259,7 @@ struct MissingFeatures {
static bool emitBranchThroughCleanup() { return false; }
static bool emitCheckedInBoundsGEP() { return false; }
static bool emitCondLikelihoodViaExpectIntrinsic() { return false; }
static bool emitConstrainedFPCall() { return false; }
static bool emitLifetimeMarkers() { return false; }
static bool emitLValueAlignmentAssumption() { return false; }
static bool emitNullCheckForDeleteCalls() { return false; }
Expand Down
31 changes: 26 additions & 5 deletions clang/include/clang/Options/Options.td
Original file line number Diff line number Diff line change
Expand Up @@ -201,6 +201,10 @@ def hlsl_Group : OptionGroup<"<HLSL group>">, Group<f_Group>,
DocName<"HLSL options">,
Visibility<[ClangOption]>;

def fsan_cov_Group : OptionGroup<"<-fsanitize-coverage group>">,
Group<f_clang_Group>,
DocName<"Sanitizer Coverage options">;

// Feature groups - these take command line options that correspond directly to
// target specific features and can be translated directly from command line
// options.
Expand Down Expand Up @@ -2413,26 +2417,26 @@ def : Flag<["-"], "fno-sanitize-blacklist">,
Group<f_clang_Group>, Flags<[HelpHidden]>, Alias<fno_sanitize_ignorelist>;

def fsanitize_coverage : CommaJoined<["-"], "fsanitize-coverage=">,
Group<f_clang_Group>,
Group<fsan_cov_Group>,
HelpText<"Specify the type of coverage instrumentation for Sanitizers">;
def fno_sanitize_coverage : CommaJoined<["-"], "fno-sanitize-coverage=">,
Group<f_clang_Group>, Visibility<[ClangOption, CLOption]>,
Group<fsan_cov_Group>, Visibility<[ClangOption, CLOption]>,
HelpText<"Disable features of coverage instrumentation for Sanitizers">,
Values<"func,bb,edge,indirect-calls,trace-bb,trace-cmp,trace-div,trace-gep,"
"8bit-counters,trace-pc,trace-pc-guard,no-prune,inline-8bit-counters,"
"inline-bool-flag">;
def fsanitize_coverage_allowlist : Joined<["-"], "fsanitize-coverage-allowlist=">,
Group<f_clang_Group>, Visibility<[ClangOption, CLOption]>,
Group<fsan_cov_Group>, Visibility<[ClangOption, CLOption]>,
HelpText<"Restrict sanitizer coverage instrumentation exclusively to modules and functions that match the provided special case list, except the blocked ones">,
MarshallingInfoStringVector<CodeGenOpts<"SanitizeCoverageAllowlistFiles">>;
def fsanitize_coverage_ignorelist : Joined<["-"], "fsanitize-coverage-ignorelist=">,
Group<f_clang_Group>, Visibility<[ClangOption, CLOption]>,
Group<fsan_cov_Group>, Visibility<[ClangOption, CLOption]>,
HelpText<"Disable sanitizer coverage instrumentation for modules and functions "
"that match the provided special case list, even the allowed ones">,
MarshallingInfoStringVector<CodeGenOpts<"SanitizeCoverageIgnorelistFiles">>;
def fsanitize_coverage_stack_depth_callback_min_EQ
: Joined<["-"], "fsanitize-coverage-stack-depth-callback-min=">,
Group<f_clang_Group>,
Group<fsan_cov_Group>,
MetaVarName<"<M>">,
HelpText<"Use callback for max stack depth tracing with minimum stack "
"depth M">,
Expand Down Expand Up @@ -8068,70 +8072,87 @@ def linker_option : Joined<["--"], "linker-option=">,
HelpText<"Add linker option">,
MarshallingInfoStringVector<CodeGenOpts<"LinkerOptions">>;
def fsanitize_coverage_type : Joined<["-"], "fsanitize-coverage-type=">,
Group<fsan_cov_Group>,
HelpText<"Sanitizer coverage type">,
MarshallingInfoInt<CodeGenOpts<"SanitizeCoverageType">>;
def fsanitize_coverage_indirect_calls
: Flag<["-"], "fsanitize-coverage-indirect-calls">,
Group<fsan_cov_Group>,
HelpText<"Enable sanitizer coverage for indirect calls">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageIndirectCalls">>;
def fsanitize_coverage_trace_bb
: Flag<["-"], "fsanitize-coverage-trace-bb">,
Group<fsan_cov_Group>,
HelpText<"Enable basic block tracing in sanitizer coverage">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageTraceBB">>;
def fsanitize_coverage_trace_cmp
: Flag<["-"], "fsanitize-coverage-trace-cmp">,
Group<fsan_cov_Group>,
HelpText<"Enable cmp instruction tracing in sanitizer coverage">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageTraceCmp">>;
def fsanitize_coverage_trace_div
: Flag<["-"], "fsanitize-coverage-trace-div">,
Group<fsan_cov_Group>,
HelpText<"Enable div instruction tracing in sanitizer coverage">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageTraceDiv">>;
def fsanitize_coverage_trace_gep
: Flag<["-"], "fsanitize-coverage-trace-gep">,
Group<fsan_cov_Group>,
HelpText<"Enable gep instruction tracing in sanitizer coverage">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageTraceGep">>;
def fsanitize_coverage_8bit_counters
: Flag<["-"], "fsanitize-coverage-8bit-counters">,
Group<fsan_cov_Group>,
HelpText<"Enable frequency counters in sanitizer coverage">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverage8bitCounters">>;
def fsanitize_coverage_inline_8bit_counters
: Flag<["-"], "fsanitize-coverage-inline-8bit-counters">,
Group<fsan_cov_Group>,
HelpText<"Enable inline 8-bit counters in sanitizer coverage">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageInline8bitCounters">>;
def fsanitize_coverage_inline_bool_flag
: Flag<["-"], "fsanitize-coverage-inline-bool-flag">,
Group<fsan_cov_Group>,
HelpText<"Enable inline bool flag in sanitizer coverage">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageInlineBoolFlag">>;
def fsanitize_coverage_pc_table
: Flag<["-"], "fsanitize-coverage-pc-table">,
Group<fsan_cov_Group>,
HelpText<"Create a table of coverage-instrumented PCs">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoveragePCTable">>;
def fsanitize_coverage_control_flow
: Flag<["-"], "fsanitize-coverage-control-flow">,
Group<fsan_cov_Group>,
HelpText<"Collect control flow of function">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageControlFlow">>;
def fsanitize_coverage_trace_pc
: Flag<["-"], "fsanitize-coverage-trace-pc">,
Group<fsan_cov_Group>,
HelpText<"Enable PC tracing in sanitizer coverage">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageTracePC">>;
def fsanitize_coverage_trace_pc_guard
: Flag<["-"], "fsanitize-coverage-trace-pc-guard">,
Group<fsan_cov_Group>,
HelpText<"Enable PC tracing with guard in sanitizer coverage">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageTracePCGuard">>;
def fsanitize_coverage_no_prune
: Flag<["-"], "fsanitize-coverage-no-prune">,
Group<fsan_cov_Group>,
HelpText<"Disable coverage pruning (i.e. instrument all blocks/edges)">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageNoPrune">>;
def fsanitize_coverage_stack_depth
: Flag<["-"], "fsanitize-coverage-stack-depth">,
Group<fsan_cov_Group>,
HelpText<"Enable max stack depth tracing">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageStackDepth">>;
def fsanitize_coverage_trace_loads
: Flag<["-"], "fsanitize-coverage-trace-loads">,
Group<fsan_cov_Group>,
HelpText<"Enable tracing of loads">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageTraceLoads">>;
def fsanitize_coverage_trace_stores
: Flag<["-"], "fsanitize-coverage-trace-stores">,
Group<fsan_cov_Group>,
HelpText<"Enable tracing of stores">,
MarshallingInfoFlag<CodeGenOpts<"SanitizeCoverageTraceStores">>;
def fexperimental_sanitize_metadata_EQ_covered
Expand Down
2 changes: 2 additions & 0 deletions clang/lib/AST/ByteCode/Compiler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -6057,13 +6057,15 @@ bool Compiler<Emitter>::visitSwitchStmt(const SwitchStmt *S) {
DefaultLabel);
if (!this->visitStmt(S->getBody()))
return false;
this->fallthrough(EndLabel);
this->emitLabel(EndLabel);

return LS.destroyLocals();
}

template <class Emitter>
bool Compiler<Emitter>::visitCaseStmt(const CaseStmt *S) {
this->fallthrough(CaseLabels[S]);
this->emitLabel(CaseLabels[S]);
return this->visitStmt(S->getSubStmt());
}
Expand Down
29 changes: 29 additions & 0 deletions clang/lib/AST/ByteCode/InterpBuiltin.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2838,6 +2838,30 @@ static bool interp__builtin_select(InterpState &S, CodePtr OpPC,
return true;
}

/// Scalar variant of AVX512 predicated select:
/// Result[i] = (Mask bit 0) ? LHS[i] : RHS[i], but only element 0 may change.
/// All other elements are taken from RHS.
static bool interp__builtin_select_scalar(InterpState &S,
const CallExpr *Call) {
unsigned N =
Call->getArg(1)->getType()->getAs<VectorType>()->getNumElements();

const Pointer &W = S.Stk.pop<Pointer>();
const Pointer &A = S.Stk.pop<Pointer>();
APSInt U = popToAPSInt(S, Call->getArg(0));
const Pointer &Dst = S.Stk.peek<Pointer>();

bool TakeA0 = U.getZExtValue() & 1ULL;

for (unsigned I = TakeA0; I != N; ++I)
Dst.elem<Floating>(I) = W.elem<Floating>(I);
if (TakeA0)
Dst.elem<Floating>(0) = A.elem<Floating>(0);

Dst.initializeAllElements();
return true;
}

static bool interp__builtin_blend(InterpState &S, CodePtr OpPC,
const CallExpr *Call) {
APSInt Mask = popToAPSInt(S, Call->getArg(2));
Expand Down Expand Up @@ -4151,6 +4175,11 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
return APInt::getAllOnes(DstBits);
});

case clang::X86::BI__builtin_ia32_selectss_128:
case clang::X86::BI__builtin_ia32_selectsd_128:
case clang::X86::BI__builtin_ia32_selectsh_128:
case clang::X86::BI__builtin_ia32_selectsbf_128:
return interp__builtin_select_scalar(S, Call);
case clang::X86::BI__builtin_ia32_vprotbi:
case clang::X86::BI__builtin_ia32_vprotdi:
case clang::X86::BI__builtin_ia32_vprotqi:
Expand Down
25 changes: 25 additions & 0 deletions clang/lib/AST/ExprConstant.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -12202,6 +12202,24 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
return Success(APValue(ResultElements.data(), SourceLen), E);
};

auto EvalSelectScalar = [&](unsigned Len) -> bool {
APSInt Mask;
APValue AVal, WVal;
if (!EvaluateInteger(E->getArg(0), Mask, Info) ||
!EvaluateAsRValue(Info, E->getArg(1), AVal) ||
!EvaluateAsRValue(Info, E->getArg(2), WVal))
return false;

bool TakeA0 = (Mask.getZExtValue() & 1u) != 0;
SmallVector<APValue, 4> Res;
Res.reserve(Len);
Res.push_back(TakeA0 ? AVal.getVectorElt(0) : WVal.getVectorElt(0));
for (unsigned I = 1; I < Len; ++I)
Res.push_back(WVal.getVectorElt(I));
APValue V(Res.data(), Res.size());
return Success(V, E);
};

switch (E->getBuiltinCallee()) {
default:
return false;
Expand Down Expand Up @@ -12505,6 +12523,13 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
return APInt((Src).trunc(DstBits));
return APInt::getAllOnes(DstBits);
});
case clang::X86::BI__builtin_ia32_selectss_128:
return EvalSelectScalar(4);
case clang::X86::BI__builtin_ia32_selectsd_128:
return EvalSelectScalar(2);
case clang::X86::BI__builtin_ia32_selectsh_128:
case clang::X86::BI__builtin_ia32_selectsbf_128:
return EvalSelectScalar(8);
case clang::X86::BI__builtin_ia32_pmuldq128:
case clang::X86::BI__builtin_ia32_pmuldq256:
case clang::X86::BI__builtin_ia32_pmuldq512:
Expand Down
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