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[bsp][stm32][artpi]:fix artpi nano #10122

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Merged
supperthomas merged 1 commit into from
Mar 18, 2025
Merged

[bsp][stm32][artpi]:fix artpi nano #10122

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7 changes: 6 additions & 1 deletion bsp/stm32/stm32h750-artpi/.ci/attachconfig/ci.attachconfig.yml
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Original file line number Diff line number Diff line change
@@ -1,7 +1,12 @@
scons.args: &scons
scons_arg:
- '--strict'

# ------ nano CI ------
nano:
<<: *scons
kconfig:
- CONFIG_RT_USING_NANO=y

# ------ peripheral CI ------
peripheral.eth:
kconfig:
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1 change: 0 additions & 1 deletion bsp/stm32/stm32h750-artpi/applications/main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,6 @@
*/

#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>

/* defined the LED0 pin: PI8 */
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6 changes: 3 additions & 3 deletions libcpu/arm/cortex-m7/cpu_cache.c
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Original file line number Diff line number Diff line change
Expand Up @@ -76,15 +76,15 @@ void rt_hw_cpu_dcache_ops(int ops, void* addr, int size)

if ((ops & clean_invalid) == clean_invalid)
{
SCB_CleanInvalidateDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);
SCB_CleanInvalidateDCache_by_Addr((void *)startAddr, size_byte);
}
else if (ops & RT_HW_CACHE_FLUSH)
{
SCB_CleanDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);
SCB_CleanDCache_by_Addr((void *)startAddr, size_byte);
}
else if (ops & RT_HW_CACHE_INVALIDATE)
{
SCB_InvalidateDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);
SCB_InvalidateDCache_by_Addr((void *)startAddr, size_byte);
}
else
{
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