This repository collects and organizes key references in the emerging field of Sensing with Computing, a paradigm that tightly fuses sensing and computation to overcome traditional interface bottlenecks. The goal is to provide researchers, students, and practitioners with an overview of important works spanning near-sensor, in-sensor, and pre-sensor computing architectures, as well as highly-relevant algorithmic and co-design methodologies.
All references are listed in chronological order to reflect the historical development of the field, and not by importance. This collection is continuously updated and aims to serve as a useful resource for exploring the evolution and future directions of sensing with computing integration.
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[Event-Driven Sensing for Efficient Perception: Vision and Audition Algorithms] β IEEE Signal Processing Magazine, vol. 36, no. 6, pp. 29-37, Nov. 2019. β S.-C. Liu, B. Rueckauer, E. Ceolini.
π Comments: Review on event sensors and related algorithm
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[Near-sensor and in-sensor computing.] β Nat Electron 3, 664β671 (2020). β Zhou, F., Chai, Y.
π Comments: Review from three views: low-level processing, high-level processing and integration techniques.
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[Event-Based Vision: A Survey.] β IEEE Transactions on Pattern Analysis and Machine Intelligence, vol. 44, no. 1, pp. 154-180, 1 Jan. 2022. β G. Gallego et al.
π Comments: Event camera review
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[Sensor-level computer vision with pixel processor arrays for agile robots.] β Sci. Robot. 7, eabl7755 (2022). β Piotr Dudek et al.
π Comments: Review the history of image sensing and processing hardware from the perspective of in-pixel computing
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[Energy-efficient activity-driven computing architectures for edge intelligence] β 2022 International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 2022, pp. 21.2.1-21.2.4. β S.-C. Liu, C. Gao, K. Kim and T. Delbruck
π Comments: Ways for TinyML on edge accelerators (hierarchical gating, sparsity, bit precision)
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[In-Sensor Computing: Materials, Devices, and Integration Technologies.] β Adv. Mater. 2023, 35, 2203830. β T. Wan, B. Shao, S. Ma, Y. Zhou, Q. Li, Y. Chai.
π Comments: Review for device level, array level and integration technologies
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[Breaking the energy-efficiency barriers for smart sensing applications with βSensing with Computingβ architectures.] β Sci. China Inf. Sci. 66, 200409 (2023). β Yang, X., Liu, Z., Tang, K., Fei Qiao, et al.
π Comments: Review of smart sensing systems with βSensing with Computingβ architectures including circuit level and co-design methodologies etc.
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AI-capable Computational CMOS Image Sensors: from Concept to Trend β International Conference on Microelectronics (ICM), 2024 β A. Abubakar, B. Wang, A. Bermak
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[From Near-Sensor to In-Sensor: A State-of-the-Art Review of Embedded AI Vision Systems] β Sensors 2024, 24(16), 5446. β Fabre, W.; Haroun, K., et al.
π Comments: Review of Near-Sensor and In-Sensor vision systems
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[Beyond Traditional Computing Architecture: The evolution of All-in-one Devices] β IEEE Electron Devices Reviews 2025 β Y. LIU, C. ZHAO, H. LI, W. YI, Z. WANG and H. TIAN
π Comments: computation within the sensing system including optical, pressure, gas, and auditory sensors
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[243.3pJ/pixel bio-inspired time-stamp-based 2D optic flow sensor for artificial compound eyes] β 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), San Francisco, CA, USA, pp. 126-127 β S. Park, J. Cho, K. Lee and E. Yoon
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[RedEye: Analog ConvNet Image Sensor Architecture for Continuous Mobile Vision] β 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA), Seoul, Korea, pp. 255-266 β R. LiKamWa, Y. Hou, Y. Gao, M. Polansky and L. Zhong
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[4.9 A 1ms high-speed vision chip with 3D-stacked 140GOPS column-parallel PEs for spatio-temporal image processing] β 2017 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 82-83 β T. Yamazaki et al.
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[A 0.62mW ultra-low-power convolutional-neural-network face-recognition processor and a CIS integrated with always-on haar-like face detector] β 2017 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 248-249 β K. Bong, S. Choi, C. Kim, S. Kang, Y. Kim and H.-J. Yoo
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[A Low-Power Convolutional Neural Network Face Recognition Processor and a CIS Integrated With Always-on Face Detector] β IEEE Journal of Solid-State Circuits, vol. 53, no. 1, pp. 115-123, Jan. 2018 β K. Bong, S. Choi, C. Kim, D. Han and H.-J. Yoo
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[B-Face: 0.2 MW CNN-Based Face Recognition Processor with Face Alignment for Mobile User Identification] β 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, pp. 137-138 β S. Kang, J. Lee, C. Kim and H.-J. Yoo
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[An Always-On 3.8 ΞΌJ/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS] β IEEE Journal of Solid-State Circuits, vol. 54, no. 1, pp. 158-172, Jan. 2019 β D. Bankman, L. Yang, B. Moons, M. Verhelst and B. Murmann
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[A 1920Γ1080 25-Frames/s 2.4-TOPS/W Low-Power 6-D Vision Processor for Unified Optical Flow and Stereo Depth With Semi-Global Matching] β IEEE Journal of Solid-State Circuits, vol. 54, no. 4, pp. 1048-1058, Apr. 2019 β Z. Li, J. Wang, D. Sylvester, D. Blaauw and H. S. Kim
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[An Ultra-Low-Power Analog-Digital Hybrid CNN Face Recognition Processor Integrated with a CIS for Always-on Mobile Devices] β 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, pp. 1-5 β J.-H. Kim, C. Kim, K. Kim and H.-J. Yoo
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[A Data-Compressive 1.5/2.75-bit Log-Gradient QVGA Image Sensor With Multi-Scale Readout for Always-On Object Detection] β IEEE Journal of Solid-State Circuits, vol. 54, no. 11, pp. 2932-2946, Nov. 2019 β C. Young, A. Omid-Zohoor, P. Lajevardi and B. Murmann
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[Energy-Efficient Low-Noise CMOS Image Sensor with Capacitor Array-Assisted Charge-Injection SAR ADC for Motion-Triggered Low-Power IoT Applications] β 2019 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 96-98 β K. D. Choo et al.
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[An Analog-Memoryless Near Sensor Computing Architecture for Always-On Intelligent Perception Applications] β 2019 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), Chengdu, China, 2019, pp. 150-155 β T. Ma et al.
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[NS-CIM: A Current-Mode Computation-in-Memory Architecture Enabling Near-Sensor Processing for Intelligent IoT Vision Nodes] β IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 9, pp. 2909-2922, Sept. 2020 β Z. Liu, F. Qiao et al.
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[Processing Near Sensor Architecture in Mixed-Signal Domain With CMOS Image Sensor of Convolutional-Kernel-Readout Method] β IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 2, pp. 389-400, Feb. 2020 β Z. Chen, F. Qiao et al.
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[ASP-SIFT: Using Analog Signal Processing Architecture to Accelerate Keypoint Detection of SIFT Algorithm] β IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 1, pp. 198-211, Jan. 2020 β Z. Fan et al.
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[NS-MD: Near-Sensor Motion Detection With Energy Harvesting Image Sensor for Always-On Visual Perception] β IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 9, pp. 3078-3082, Sept. 2021 β M. Nazhamaiti, F. Qiao et al.
π Comments: Architecture level; Reconfigurable pixel structures can harvest solar energy from the focal plane and conduct motion detection simultaneously; The near-sensor motion detection architecture combines analog-domain edge detection and digital-domain frame differencing technique
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[An On-Chip Binary-Weight Convolution CMOS Image Sensor for Neural Networks] β IEEE Transactions on Industrial Electronics, vol. 68, no. 8, pp. 7567-7576, Aug. 2021 β W.-T. Kim, H. Lee, J.-G. Kim and B.-G. Lee
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[An Ultra-Low-Power Image Signal Processor for Hierarchical Image Recognition With Deep Neural Networks] β IEEE Journal of Solid-State Circuits, vol. 56, no. 4, pp. 1071-1081, Apr. 2021 β H. An et al.
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[Within-Camera Multilayer Perceptron DVS Denoising] β 2023 IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops (CVPRW), Vancouver, BC, Canada, 2023, pp. 3933-3942 β A. Rios-Navarro et al.
π Comments: Digital implementation
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[39 000-Subexposures/s Dual-ADC CMOS Image Sensor With Dual-Tap Coded-Exposure Pixels for Single-Shot HDR and 3-D Computational Imaging] β IEEE Journal of Solid-State Circuits, vol. 58, no. 11, pp. 3150-3163, Nov. 2023 β R. Gulve et al.
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[H3DAtten: Heterogeneous 3-D Integrated Hybrid Analog and Digital Compute-in-Memory Accelerator for Vision Transformer Self-Attention] β IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, no. 10, pp. 1592-1602, Oct. 2023 β W. Li, M. Manley, J. Read, A. Kaul, M. S. Bakir and S. Yu
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[Monolithic 3D Integration of Analog RRAM-Based Computing-in-Memory and Sensor for Energy-Efficient Near-Sensor Computing] β Adv. Mater., 2024. β Y. Du, J. Tang, Y. Li, Y. Xi, Y. Li, J. Li, H. Huang, Q. Qin, Q. Zhang, B. Gao, N. Deng, H. Qian, H. Wu
π Comments: Energy-efficient near-sensor computing enabled by monolithic 3D integration of analog RRAM-based CIM and sensor
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[MANTIS: A Mixed-Signal Near-Sensor Convolutional Imager SoC Using Charge-Domain 4b-Weighted 5-to-84-TOPS/W MAC Operations for Feature Extraction and Region-of-Interest Detection] β IEEE Journal of Solid-State Circuits, vol. 60, no. 3, pp. 934-948, Mar. 2025 β M. Lefebvre and D. Bol
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[The Design of a Computer Vision Sensor Based on a Low-Power Edge Detection Circuit] β Sensors, 25(10), 3219, 2025 β S. Lee, Y. C. Yun, S. M. Heu, K. H. Lee, S. J. Lee, K. Lee, J. Moon, H. Lim, T. Jang, M. Song & S. Y. Kim
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[A High-Resolution Solid-State LiDAR Sensor With Reconfigurable Histogramming Time-to-Digital Converter and Filter for Depth Refinement] β IEEE Journal of Solid-State Circuits, 2025 β W. Roh et al.
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[SenGuard: A Novel Processing In-Sensor Method for Privacy-Enhanced Smart Imaging] β Proceedings of the Great Lakes Symposium on VLSI 2025 (GLSVLSI '25), ACM, New York, USA, pp. 587β592 β Neeraj Solanki, Sepehr Tabrizchi, Ali Shafiee Sarvestani, Shaahin Angizi, Arman Roohi
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A Pathway to Near Tissue Computing through Processing-in-CTIA Pixels for Biomedical Applications β arXiv preprint, 2025 β Zihan Yin, Subhradip Chakraborty, Ankur Singh, Chengwei Zhou, Gourav Datta, Akhilesh Jaiswal
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[A retina-inspired pathway to real-time motion prediction inside image sensors for extreme-edge intelligence] β Neuromorphic Computing and Engineering, published 23 July 2025 β Subhradip Chakraborty, Shay Snyder, Md Abdullah-Al Kaiser, Maryam Parsa, Gregory Schwartz, Akhilesh R. Jaiswal
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[Near-Sensor Neuromorphic Computing System Based on a Thermopile Infrared Detector and a Memristor for Encrypted Visual Information Transmission] β Nano Letters, 2025 β Zheng Wang, Jinhao Zhang, Zhenyu Zhang, Jialin Meng, Cheng Lei, Tianyu Wang
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[Near-Sensor Edge Computing System Enabled by a CMOS Compatible Photonic Integrated Circuit Platform Using Bilayer AlN/Si Waveguides] β Nano-Micro Lett. 17, 261 (2025) β Z. Ren, Z. Zhang, Y. Zhuge, et al.
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[AJPEG: A 26.4-pJ/pixel, 252-fps, 128Γ128 Image Sensor with an In-Sensor Analog DCT Processor for Data Compression] β 2025 IEEE Custom Integrated Circuits Conference (CICC) β R. Wan, Y. Xu, D.-W. Jee, M. Seok
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[Near-Sensor Analog Computing via Monolithic 3D Piezoelectric SensorβFeFET for Tactile Sensing System] β Adv. Funct. Mater., 2025. β W. Kim, S. Kim, J. Ha, et al.
π Comments: Tactile sensing system enabled by monolithic 3D integration of piezoelectric sensor and FeFET for near-sensor analog computing
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[Focal-Plane Algorithmically-Multiplying CMOS Computational Image Sensor] β IEEE Journal of Solid-State Circuits β A. Nilchi, J. Aziz, R. Genov (2009)
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[A 100,000 fps Vision Sensor with Embedded 535GOPS/W 256x256 SIMD Processor Array] β VLSI Circuits Symposium (2013) β S.J. Carey, A. Lopich, D.R.W. Barr, B. Wang, P. Dudek (2013)
π Comments: Pixel-parallel mixed-signal processing
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[A 240 Γ 180 130 dB 3 Β΅s Latency Global Shutter Spatiotemporal Vision Sensor] β IEEE Journal of Solid-State Circuits β C. Brandli, R. Berner, M. Yang, S.-C. Liu, T. Delbruck (2014)
π Comments: Combining DVS and APS at pixel level, sharing PD
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[A Dynamic Vision Sensor With 1% Temporal Contrast Sensitivity and In-Pixel Asynchronous Delta Modulator for Event Encoding] β IEEE Journal of Solid-State Circuits β M. Yang, S.-C. Liu, T. Delbruck (2015)
π Comments: A new low-noise high-gain DVS pixel for improved temporal contrast sensitivity
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[A 0.5 V, 14.28-kframes/s, 96.7-dB Smart Image Sensor With Array-Level Image Signal Processing for IoT Applications] β IEEE Transactions on Electron Devices β C. Yin, C.-F. Chiu, C.-C. Hsieh (2016)
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[Envision: A 0.26-to-10TOPS/W subword-parallel dynamic-voltage-accuracy-frequency-scalable CNN processor in 28nm FDSOI] β ISSCC (2017) β B. Moons, R. Uytterhoeven, W. Dehaene, M. Verhelst (2017)
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[A 1/2.3inch 20Mpixel 3-layer stacked CMOS Image Sensor with DRAM] β ISSCC (2017) β T. Haruta et al. (2017)
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[Scamp5d Vision System and Development Framework] β ICDSC (2018) β J. Chen, S.J. Carey, P. Dudek (2018)
π Comments: Sensor-level SIMD parallel processing
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[A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing] β VLSI Circuits (2018) β L. Millet et al. (2018)
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[A Camera That CNNs: Towards Embedded Neural Networks on Pixel Processor Arrays] β ICCV (2019) β L. Bose, P. Dudek, J. Chen, S. Carey, W. Mayol-Cuevas (2019)
π Comments: A first step towards embedding neural network processing capability directly onto the focal plane of a sensor
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[A Stacked Global-Shutter CMOS Imager with SC-Type Hybrid-GS Pixel and Self-Knee Point Calibration Single Frame HDR and On-Chip Binarization Algorithm] β ISSCC (2019) β C. Xu et al. (2019)
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[Dual-Tap Computational Photography Image Sensor With Per-Pixel Pipelined Digital Memory for Intra-Frame Coded Multi-Exposure] β IEEE Journal of Solid-State Circuits β N. Sarhangnejad et al. (2019)
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[A 3.0ΞΌW@5fps QQVGA Self-Controlled Wake-Up Imager with On-Chip Motion Detection, Auto-Exposure and Object Recognition] β VLSI Circuits (2020) β A. Verdant et al. (2020)
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[Utilizing Direct Photocurrent Computation and 2D Kernel Scheduling to Improve In-Sensor-Processing Efficiency] β DAC (2020) β H. Xu, F. Qiao et al. (2020)
π Comments: Utilize photocurrents in the convolution operations directly; Adaptive kernel mapping and scheduling method
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[A 4.6ΞΌm, 512Γ512, Ultra-Low Power Stacked Digital Pixel Sensor with Triple Quantization and 127dB Dynamic Range] β IEDM (2020) β C. Liu et al. (2020)
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[A Low-Power 65/14nm Stacked CMOS Image Sensor] β ISCAS (2020) β M. Kwon et al. (2020)
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[A 4.6-ΞΌm, 127-dB Dynamic Range, Ultra-Low Power Stacked Digital Pixel Sensor With Overlapped Triple Quantization] β IEEE Transactions on Electron Devices, vol. 69, no. 6, pp. 2943-2950, June 2022 β R. Ikeno et al. (2022)
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[MACSen: A Processing-In-Sensor Architecture Integrating MAC Operations Into Image Sensor for Ultra-Low-Power BNN-Based Intelligent Visual Perception] β IEEE Trans. on Circuits and Systems II: Express Briefs β H. Xu, F. Qiao et al. (Feb. 2021)
π Comments: Novel PIS architecture integrating sensing and MAC operations
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[A 0.5-V Real-Time Computational CMOS Image Sensor With Programmable Kernel for Feature Extraction] β IEEE Journal of Solid-State Circuits 2021β T.-H. Hsu et al. (May 2021)
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[A 0.8 V Multimode Vision Sensor for Motion and Saliency Detection With Ping-Pong PWM Pixel] β IEEE Journal of Solid-State Circuits 2021β T.-H. Hsu et al. (Aug. 2021)
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[A 4.57 ΞΌW@120fps Vision System of Sensing with Computing for BNN-Based Perception Applications] β A-SSCC (2021) β H. Xu, F. Qiao et al. (2021)
π Comments: Using both In-Sensor and Near-Sensor architecture (DPCE array and CIM)
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[A 5.9ΞΌW Ultra-Low-Power Dual-Resolution CIS Chip of Sensing-with-Computing for Always-on Intelligent Visual Devices] β ISCAS (2021) β Z. Li, H. Xu, L. Luo, Q. Wei, F. Qiao (2021)
π Comments: Mixed-signal
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[A 1/2.3inch 12.3Mpixel with On-Chip 4.97TOPS/W CNN Processor Back-Illuminated Stacked CMOS Image Sensor] β ISSCC (2021) β R. Eki et al. (2021)
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[A 0.2-to-3.6TOPS/W Programmable Convolutional Imager SoC with In-Sensor Current-Domain Ternary-Weighted MAC Operations] β ISSCC (2021) β M. Lefebvre, L. Moreau, R. Dekimpe, D. Bol (2021)
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[A 21pJ/frame/pixel Imager and 34pJ/frame/pixel Image Processor for a Low-Vision Augmented-Reality Smart Contact Lens] β ISSCC (2021) β R. Singh, S. Bailey, P. Chang, A. Olyaei, M. Hekmat, R. Winoto (2021)
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[A 30-fps 192Γ192 CMOS Image Sensor With Per-Frame Spatial-Temporal Coded Exposure for Compressive Focal-Stack Depth Sensing] β IEEE Journal of Solid-State Circuits 2022 β Y. Luo, S. Mirabbasi (Jun. 2022)
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[A 2.17ΞΌW@120fps Ultra-Low-Power Dual-Mode CMOS Image Sensor with Senputing Architecture] β ASP-DAC (2022) β Z. Li, H. Xu, Z. Liu, L. Luo, Q. Wei, F. Qiao (2022)
π Comments: Sensor level; CMOS Image Sensor (CIS) chip based on Senputing architecture
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[Senputing: An Ultra-Low-Power Always-On Vision Perception Chip Featuring the Deep Fusion of Sensing and Computing] β IEEE Journal of Solid-State Circuits 2022β H. Xu, F. Qiao et al. (Jan. 2022)
π Comments: Sensor level; Novel processing-in-sensor design for always-on hierarchical vision perception
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[Dual-Port CMOS Image Sensor with Regression-Based HDR Flux-to-Digital Conversion and 80ns Rapid-Update Pixel-Wise Exposure Coding] β ISSCC (2023) β R. Gulve et al. (2023)
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[Optoelectronic graded neurons for bioinspired in-sensor motion perception] β Nature Nanotechnology β J. Chen, Z. Zhou, B.J. Kim et al. (2023)
π Comments: MoSβ phototransistor; Motion detection
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[All-analog photoelectronic chip for high-speed vision tasks] β Nature 623, 48β57 (2023) β Y. Chen, M. Nazhamaiti, H. Xu et al. (2023)
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[A 0.8 V Intelligent Vision Sensor With Tiny Convolutional Neural Network and Programmable Weights Using Mixed-Mode Processing-in-Sensor Technique for Image Classification] β IEEE Journal of Solid-State Circuits β T.-H. Hsu et al. (Nov. 2023)
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[A 3.96ΞΌm, 124dB Dynamic Range, 6.2mW Stacked Digital Pixel Sensor with Monochrome and Near-Infrared Dual-Channel Global Shutter Capture] β VLSI Technology & Circuits (2023) β S. Chen et al. (2023)
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[Multimodal In-Sensor Computing System Using Integrated Silicon Photonic Convolutional Processor] β Advanced Science (2024) β Z. Xiao, Z. Ren, Y. Zhuge, Z. Zhang, J. Zhou, S. Xu, C. Xu, B. Dong, C. Lee (2024)
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[A Pathway to Near Tissue Computing through Processing-in-CTIA Pixels for Biomedical Applications] β arXiv (2025) β Z. Yin, S. Chakraborty, A. Singh, C. Zhou, G. Datta, A. Jaiswal (2025)
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[SnapPix: Efficient-Coding--Inspired In-Sensor Compression for Edge Vision] β arXiv (2025) β W. Lin, T. Ma, A. Boloor, Y. Feng, R. Xing, X. Zhang, Y. Zhu (2025)
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[OASIS: Optimized Lightweight Autoencoder System for Distributed In-Sensor Computing] β arXiv (2025) β C. Zhou, S. Sarkar, Y. Li, A. Sanyal, G. Datta (2025)
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[AJPEG: A 26.4-pJ/pixel, 252-fps, 128Γ128 Image Sensor with an In-Sensor Analog DCT Processor for Data Compression] β CICC (2025) β R. Wan, Y. Xu, D.-W. Jee, M. Seok (2025)
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[All-analog photoelectronic chip for high-speed vision tasks] β Nature 623, 48β57 (2023). β Chen, Y., Nazhamaiti, M., Xu, H. et al.
π Comments: All-analog chip combining electronic and light computing; Pre-sensor with In-sensor architecture co-design
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[Combined frame- and event-based detection and tracking] β 2016 IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, QC, Canada, 2016, pp. 2511-2514. β H. Liu, D.P. Moeys, G. Das, D. Neil, S.-C. Liu, T. DelbrΓΌck
π Comments: Object tracking algorithm for a moving platform using DAVIS
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[Target tracking and classification using compressive sensing camera for SWIR videos] β SIViP 13, 1629β1637 (2019). β C. Kwan, B. Chou, J. Yang et al.
π Comments: Deep learning approach that directly performs target tracking and classification in the compressive measurement domain without frame reconstruction
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[Fully Embedding Fast Convolutional Networks on Pixel Processor Arrays] β In Computer Vision β ECCV 2020: 16th European Conference, Glasgow, UK, August 23β28, 2020, Proceedings, Part XXIX. Springer-Verlag, 488β503. β L. Bose, P. Dudek, J. Chen, S.J. Carey, W.W. Mayol-Cuevas
π Comments: Software-hardware co-design
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[On-sensor binarized CNN inference with dynamic model swapping in pixel processor arrays] β Front. Neurosci. 16:909448 (2022). β Y. Liu, L. Bose, R. Fan, P. Dudek, W. Mayol-Cuevas
π Comments: Binarized CNNs; Model swapping paradigm
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[PixelRNN: In-pixel Recurrent Neural Networks for End-to-end-optimized Perception with Neural Sensors] β arXiv:2304.05440 (2023). β Haley M. So, Laurie Bose, Piotr Dudek, Gordon Wetzstein
π Comments: PixelRNN encodes spatio-temporal features on the sensor using purely binary operations; Based on SCAMP-5 sensor-processor platform; Software-hardware co-design
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The authors gratefully acknowledge the efforts and support of the following contributorsπ:
Fei Qiao (Tsinghua University; SenseLab), Yongtao Zhou (Xiamen University; SenseLab), Haijin Su (Beijing Jiaotong University; SenseLab), and the entire SenseLab team.
