Load mem displacement when necessary on AArch64 #382
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit PR: #382
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit PR: #382
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit PR: #382
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit PR: #382
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit PR: #382
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit PR: #382
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit
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* LDR instruction for AArch64 * Split loads in arm64_split when memory address displacements do not fit
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When we lower
Op::Loadfor a memory address, we useLDUR, which only allows you to specify a displacement from a memory address up to 9 bits wide.If it's longer than that, we now split that instruction into an
Op::Lea(to load the memory address into a register) and then create a new memory operand with that register as the base.When we then in turn lower
Op::Lea, we useADDto add the base register with the displacement. The add instruction in this case accepts a 12-bit immediate optionally shifted left by 12 bits. If the displacement cannot be encoded into theADDinstruction, we then split again into loading the displacement value into a register (the normal MOVZ/MOVKs), then perform theADDwith a register.