Rz 5.10 cip41 sr overlays wip#6
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mdanikin merged 18 commits intorz-5.10-cip41-srfrom Oct 27, 2024
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…voltage_switch" This reverts commit 9939c4b.
Add support for building DT overlays (%.dtbo). The overlay's source file will have the usual extension, i.e. .dts, though the blob will have .dtbo extension to distinguish it from normal blobs. Acked-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/434ba2467dd0cd011565625aeb3450650afe0aae.1611904394.git.viresh.kumar@linaro.org
Factor out the common prerequisites for DT compilation into the new target, dtbs_prepare. Add comments to explain why include/config/kernel.release is the prerequisite. Our policy is that installation targets must not rebuild anything in the tree. If 'make modules_install' is executed as root, include/config/kernel.release may be owned by root. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Nicolas Schier <nicolas@fjasle.eu> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
%.dtbo.o and %.dtbo.S files are used to build-in DT Overlay. They should should not be removed by Make or the kernel will be needlessly rebuilt. These should be removed by "clean" and ignored by git like other intermediate files. Reported-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Andrew Davis <afd@ti.com> Fixes: 941214a ("kbuild: Allow DTB overlays to built into .dtbo.S files") Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Masahiro Yamada <masahiroy@kernel.org> Link: https://lore.kernel.org/r/20221114205939.27994-1-afd@ti.com Signed-off-by: Rob Herring <robh@kernel.org>
This adds the following commits from upstream: 183df9e9c2b9 gitignore: Ignore the swp files 0db6d09584e1 gitignore: Add cscope files 307afa1a7be8 Update Jon Loeliger's email ca16a723fa9d fdtdump: Fix gcc11 warning 64990a272e8f srcpos: increase MAX_SRCFILE_DEPTH 163f0469bf2e dtc: Allow overlays to have .dtbo extension 3b01518e688d Set last_comp_version correctly in new dtb and fix potential version issues in fdt_open_into f7e5737f26aa tests: Fix overlay_overlay_nosugar test case 7cd5d5fe43d5 libfdt: Tweak description of assume-aligned load helpers a7c404099349 libfdt: Internally perform potentially unaligned loads bab85e48a6f4 meson: increase default timeout for tests f8b46098824d meson: do not assume python is installed, skip tests 30a56bce4f0b meson: fix -Wall warning 5e735860c478 libfdt: Check for 8-byte address alignment in fdt_ro_probe_() 67849a327927 build-sys: add meson build 05874d08212d pylibfdt: allow build out of tree 3bc3a6b9fe0c dtc: Fix signedness comparisons warnings: Wrap (-1) e1147b159e92 dtc: Fix signedness comparisons warnings: change types 04cf1fdc0fcf convert-dtsv0: Fix signedness comparisons warning b30013edb878 libfdt: Fix kernel-doc comments Signed-off-by: Rob Herring <robh@kernel.org>
When the driver was merged the drpai device-tree node was included in the wrong place. This should be merged as a fixup to the commit that introduced the error. Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
…idrun SOMs This patch creates distinct overlay files for RZ/G2LC-G2UL and RZ/G2L-V2L to support platform-specific configurations for SD and eMMC.
…r a new PMIC driver This patch refines the `raa215300` PMIC node configuration across the RZ/G2L and RZ/G2LC Solidrun SOM device trees
…SOMs family Correctly allocate the GPU’s reserved memory region.
…Solidrun SOMs family
…ce trees Refactors the Solidrun SOM device trees for improved readability and consistency: - Corrects indentation, spacing, and alignment issues across all device tree files. - Removes commented-out legacy nodes and unused properties. - Standardizes labels, GPIO definitions, and regulator configurations. - Updates copyright headers for consistency. This cleanup improves maintainability without functional changes.
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As per the RZ/G2UL hardware manual Table 33.4 Clock List, the maximum
dot clock for the DPI interface is 83.5 MHz. Add mode_valid callback
to reject modes greater than 83.5 MHz.
---
Before applying the patch:
root@smarc-rzg2ul:~# modetest -M rzg2l-du
Encoders:
id crtc type possible crtcs possible clones
37 36 none 0x00000001 0x00000001
Connectors:
id encoder status name size (mm) modes encoders
38 37 connected HDMI-A-1 520x320 30 37
modes:
index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
#0 1920x1080 59.72 1920 1968 2000 2080 1080 1082 1087 1111 138000 flags: phsync, nvsync; type: preferred, driver
#1 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver
#2 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver
#3 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver
#4 1280x1024 75.02 1280 1296 1440 1688 1024 1025 1028 1066 135000 flags: phsync, pvsync; type: driver
#5 1280x1024 60.02 1280 1328 1440 1688 1024 1025 1028 1066 108000 flags: phsync, pvsync; type: driver
#6 1152x864 75.00 1152 1216 1344 1600 864 865 868 900 108000 flags: phsync, pvsync; type: driver
#7 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: userdef, driver
#8 1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver
#9 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver
...
After applying the patch:
root@smarc-rzg2ul:~# modetest -M rzg2l-du
Encoders:
id crtc type possible crtcs possible clones
37 36 none 0x00000001 0x00000001
Connectors:
id encoder status name size (mm) modes encoders
38 37 connected HDMI-A-1 520x320 23 37
modes:
index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
#0 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver
#1 1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver
#2 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver
#3 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver
#4 1024x768 75.03 1024 1040 1136 1312 768 769 772 800 78750 flags: phsync, pvsync; type: driver
#5 1024x768 70.07 1024 1048 1184 1328 768 771 777 806 75000 flags: nhsync, nvsync; type: driver
#6 1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver
#7 1080x607 59.97 1080 1120 1232 1384 607 608 611 629 52210 flags: nhsync, pvsync; type:
#8 832x624 74.55 832 864 928 1152 624 625 628 667 57284 flags: nhsync, nvsync; type: driver
#9 800x600 75.00 800 816 896 1056 600 601 604 625 49500 flags: phsync, pvsync; type: driver
...
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: hienhuynh <hien.huynh.px@renesas.com>
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