ECE 443 Computer Architectures | Fall 2025 by Seth Myers and Aubrey McKinney
This project implements our earlier ALU project into a full simulated processor.
- 7 instructions: addition (
add), multiplication (mult), passthrough A (pa), passthrough B (pb), subtraction (sub), load immediate (ldi), store halfword (sh), and load halfword (lh) - two 16-bit instruction types:
- R-type: | 1 unused bit | 3-bit opcode | 4-bit value C | 4-bit value A | 4-bit value B |
- I-type: | 1 unused bit | 3-bit opcode | 4-bit value D | 8-bit immediate value |
- Instruction decoder
- Data flow control unit
- 256 halfwords of data memory (RAM)
- 8 CPU registers
- Separate instruction memory
