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Add v2i64 comparison operations #39

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Sep 19, 2018
Merged

Add v2i64 comparison operations #39

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3cfe6af
Add v2i64 comparison operations
tlively Sep 5, 2018
87bdadd
Add opcode space holes instead of new instructions
tlively Sep 12, 2018
1cfa55c
Strikethrough i64x2.mul
tlively Sep 12, 2018
9626b29
Strikethrough opcode numbers, too
tlively Sep 13, 2018
c52f790
Remove nonexistent instructions entirely
tlively Sep 19, 2018
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210 changes: 105 additions & 105 deletions proposals/simd/BinarySIMD.md
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Original file line number Diff line number Diff line change
Expand Up @@ -62,108 +62,108 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`.
| `i8x16.mul` | 32 | - |
| `i16x8.mul` | 33 | - |
| `i32x4.mul` | 34 | - |
| `i8x16.neg` | 35 | - |
| `i16x8.neg` | 36 | - |
| `i32x4.neg` | 37 | - |
| `i64x2.neg` | 38 | - |
| `i8x16.add_saturate_s` | 39 | - |
| `i8x16.add_saturate_u` | 40 | - |
| `i16x8.add_saturate_s` | 41 | - |
| `i16x8.add_saturate_u` | 42 | - |
| `i8x16.sub_saturate_s` | 43 | - |
| `i8x16.sub_saturate_u` | 44 | - |
| `i16x8.sub_saturate_s` | 45 | - |
| `i16x8.sub_saturate_u` | 46 | - |
| `i8x16.shl` | 47 | - |
| `i16x8.shl` | 48 | - |
| `i32x4.shl` | 49 | - |
| `i64x2.shl` | 50 | - |
| `i8x16.shr_s` | 51 | - |
| `i8x16.shr_u` | 52 | - |
| `i16x8.shr_s` | 53 | - |
| `i16x8.shr_u` | 54 | - |
| `i32x4.shr_s` | 55 | - |
| `i32x4.shr_u` | 56 | - |
| `i64x2.shr_s` | 57 | - |
| `i64x2.shr_u` | 58 | - |
| `v128.and` | 59 | - |
| `v128.or` | 60 | - |
| `v128.xor` | 61 | - |
| `v128.not` | 62 | - |
| `v128.bitselect` | 63 | - |
| `i8x16.any_true` | 64 | - |
| `i16x8.any_true` | 65 | - |
| `i32x4.any_true` | 66 | - |
| `i64x2.any_true` | 67 | - |
| `i8x16.all_true` | 68 | - |
| `i16x8.all_true` | 69 | - |
| `i32x4.all_true` | 70 | - |
| `i64x2.all_true` | 71 | - |
| `i8x16.eq` | 72 | - |
| `i16x8.eq` | 73 | - |
| `i32x4.eq` | 74 | - |
| `f32x4.eq` | 75 | - |
| `f64x2.eq` | 76 | - |
| `i8x16.ne` | 77 | - |
| `i16x8.ne` | 78 | - |
| `i32x4.ne` | 79 | - |
| `f32x4.ne` | 80 | - |
| `f64x2.ne` | 81 | - |
| `i8x16.lt_s` | 82 | - |
| `i8x16.lt_u` | 83 | - |
| `i16x8.lt_s` | 84 | - |
| `i16x8.lt_u` | 85 | - |
| `i32x4.lt_s` | 86 | - |
| `i32x4.lt_u` | 87 | - |
| `f32x4.lt` | 88 | - |
| `f64x2.lt` | 89 | - |
| `i8x16.le_s` | 90 | - |
| `i8x16.le_u` | 91 | - |
| `i16x8.le_s` | 92 | - |
| `i16x8.le_u` | 93 | - |
| `i32x4.le_s` | 94 | - |
| `i32x4.le_u` | 95 | - |
| `f32x4.le` | 96 | - |
| `f64x2.le` | 97 | - |
| `i8x16.gt_s` | 98 | - |
| `i8x16.gt_u` | 99 | - |
| `i16x8.gt_s` | 100 | - |
| `i16x8.gt_u` | 101 | - |
| `i32x4.gt_s` | 102 | - |
| `i32x4.gt_u` | 103 | - |
| `f32x4.gt` | 104 | - |
| `f64x2.gt` | 105 | - |
| `i8x16.ge_s` | 106 | - |
| `i8x16.ge_u` | 107 | - |
| `i16x8.ge_s` | 108 | - |
| `i16x8.ge_u` | 109 | - |
| `i32x4.ge_s` | 110 | - |
| `i32x4.ge_u` | 111 | - |
| `f32x4.ge` | 112 | - |
| `f64x2.ge` | 113 | - |
| `f32x4.neg` | 114 | - |
| `f64x2.neg` | 115 | - |
| `f32x4.abs` | 116 | - |
| `f64x2.abs` | 117 | - |
| `f32x4.min` | 118 | - |
| `f64x2.min` | 119 | - |
| `f32x4.max` | 120 | - |
| `f64x2.max` | 121 | - |
| `f32x4.add` | 122 | - |
| `f64x2.add` | 123 | - |
| `f32x4.sub` | 124 | - |
| `f64x2.sub` | 125 | - |
| `f32x4.div` | 126 | - |
| `f64x2.div` | 127 | - |
| `f32x4.mul` | 128 | - |
| `f64x2.mul` | 129 | - |
| `f32x4.sqrt` | 130 | - |
| `f64x2.sqrt` | 131 | - |
| `f32x4.convert_s/i32x4` | 132 | - |
| `f32x4.convert_u/i32x4` | 133 | - |
| `f64x2.convert_s/i64x2` | 134 | - |
| `f64x2.convert_u/i64x2` | 135 | - |
| `i32x4.trunc_s/f32x4:sat` | 136 | - |
| `i32x4.trunc_u/f32x4:sat` | 137 | - |
| `i64x2.trunc_s/f64x2:sat` | 138 | - |
| `i64x2.trunc_u/f64x2:sat` | 139 | - |
| `i8x16.neg` | 36 | - |
| `i16x8.neg` | 37 | - |
| `i32x4.neg` | 38 | - |
| `i64x2.neg` | 39 | - |
| `i8x16.add_saturate_s` | 40 | - |
| `i8x16.add_saturate_u` | 41 | - |
| `i16x8.add_saturate_s` | 42 | - |
| `i16x8.add_saturate_u` | 43 | - |
| `i8x16.sub_saturate_s` | 44 | - |
| `i8x16.sub_saturate_u` | 45 | - |
| `i16x8.sub_saturate_s` | 46 | - |
| `i16x8.sub_saturate_u` | 47 | - |
| `i8x16.shl` | 48 | - |
| `i16x8.shl` | 49 | - |
| `i32x4.shl` | 50 | - |
| `i64x2.shl` | 51 | - |
| `i8x16.shr_s` | 52 | - |
| `i8x16.shr_u` | 53 | - |
| `i16x8.shr_s` | 54 | - |
| `i16x8.shr_u` | 55 | - |
| `i32x4.shr_s` | 56 | - |
| `i32x4.shr_u` | 57 | - |
| `i64x2.shr_s` | 58 | - |
| `i64x2.shr_u` | 59 | - |
| `v128.and` | 60 | - |
| `v128.or` | 61 | - |
| `v128.xor` | 62 | - |
| `v128.not` | 63 | - |
| `v128.bitselect` | 64 | - |
| `i8x16.any_true` | 65 | - |
| `i16x8.any_true` | 66 | - |
| `i32x4.any_true` | 67 | - |
| `i64x2.any_true` | 68 | - |
| `i8x16.all_true` | 69 | - |
| `i16x8.all_true` | 70 | - |
| `i32x4.all_true` | 71 | - |
| `i64x2.all_true` | 72 | - |
| `i8x16.eq` | 73 | - |
| `i16x8.eq` | 74 | - |
| `i32x4.eq` | 75 | - |
| `f32x4.eq` | 77 | - |
| `f64x2.eq` | 78 | - |
| `i8x16.ne` | 79 | - |
| `i16x8.ne` | 80 | - |
| `i32x4.ne` | 81 | - |
| `f32x4.ne` | 83 | - |
| `f64x2.ne` | 84 | - |
| `i8x16.lt_s` | 85 | - |
| `i8x16.lt_u` | 86 | - |
| `i16x8.lt_s` | 87 | - |
| `i16x8.lt_u` | 88 | - |
| `i32x4.lt_s` | 89 | - |
| `i32x4.lt_u` | 90 | - |
| `f32x4.lt` | 93 | - |
| `f64x2.lt` | 94 | - |
| `i8x16.le_s` | 95 | - |
| `i8x16.le_u` | 96 | - |
| `i16x8.le_s` | 97 | - |
| `i16x8.le_u` | 98 | - |
| `i32x4.le_s` | 99 | - |
| `i32x4.le_u` | 100 | - |
| `f32x4.le` | 103 | - |
| `f64x2.le` | 104 | - |
| `i8x16.gt_s` | 105 | - |
| `i8x16.gt_u` | 106 | - |
| `i16x8.gt_s` | 107 | - |
| `i16x8.gt_u` | 108 | - |
| `i32x4.gt_s` | 109 | - |
| `i32x4.gt_u` | 110 | - |
| `f32x4.gt` | 113 | - |
| `f64x2.gt` | 114 | - |
| `i8x16.ge_s` | 115 | - |
| `i8x16.ge_u` | 116 | - |
| `i16x8.ge_s` | 117 | - |
| `i16x8.ge_u` | 118 | - |
| `i32x4.ge_s` | 119 | - |
| `i32x4.ge_u` | 120 | - |
| `f32x4.ge` | 123 | - |
| `f64x2.ge` | 124 | - |
| `f32x4.neg` | 125 | - |
| `f64x2.neg` | 126 | - |
| `f32x4.abs` | 127 | - |
| `f64x2.abs` | 128 | - |
| `f32x4.min` | 129 | - |
| `f64x2.min` | 130 | - |
| `f32x4.max` | 131 | - |
| `f64x2.max` | 132 | - |
| `f32x4.add` | 133 | - |
| `f64x2.add` | 134 | - |
| `f32x4.sub` | 135 | - |
| `f64x2.sub` | 136 | - |
| `f32x4.div` | 137 | - |
| `f64x2.div` | 138 | - |
| `f32x4.mul` | 139 | - |
| `f64x2.mul` | 140 | - |
| `f32x4.sqrt` | 141 | - |
| `f64x2.sqrt` | 142 | - |
| `f32x4.convert_s/i32x4` | 143 | - |
| `f32x4.convert_u/i32x4` | 144 | - |
| `f64x2.convert_s/i64x2` | 145 | - |
| `f64x2.convert_u/i64x2` | 146 | - |
| `i32x4.trunc_s/f32x4:sat` | 147 | - |
| `i32x4.trunc_u/f32x4:sat` | 148 | - |
| `i64x2.trunc_s/f64x2:sat` | 149 | - |
| `i64x2.trunc_u/f64x2:sat` | 150 | - |